74AUP2G08GT,115 NXP Semiconductors, 74AUP2G08GT,115 Datasheet - Page 2
![IC AND GATE DL 2IN 8-XSON](/photos/6/94/69486/8-xson_sml.jpg)
74AUP2G08GT,115
Manufacturer Part Number
74AUP2G08GT,115
Description
IC AND GATE DL 2IN 8-XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet
1.74AUP2G08DC125.pdf
(21 pages)
Specifications of 74AUP2G08GT,115
Logic Type
AND Gate
Number Of Inputs
2
Number Of Circuits
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-XSON
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74AUP2G08GT-G
74AUP2G08GT-G
935280712115
74AUP2G08GT-G
935280712115
NXP Semiconductors
3. Ordering information
Table 1.
4. Marking
Table 2.
[1]
5. Functional diagram
74AUP2G08
Product data sheet
Type number
74AUP2G08DC
74AUP2G08GT
74AUP2G08GF
74AUP2G08GD
74AUP2G08GM
74AUP2G08GN
74AUP2G08GS
Type number
74AUP2G08DC
74AUP2G08GT
74AUP2G08GF
74AUP2G08GD
74AUP2G08GM
74AUP2G08GN
74AUP2G08GS
Fig 1.
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Logic symbol
Ordering information
Marking codes
1A
1B
2A
2B
001aah788
Package
Temperature range Name
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
1Y
2Y
All information provided in this document is subject to legal disclaimers.
Fig 2.
VSSOP8
XSON8
XSON8
XSON8U
XQFN8U
XSON8
XSON8
Rev. 4 — 9 November 2010
IEC logic symbol
Description
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
plastic extremely thin small outline package; no leads;
8 terminals; body 1 × 1.95 × 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 × 1 × 0.5 mm
plastic extremely thin small outline package; no leads;
8 terminals; UTLP based; body 3 × 2 × 0.5 mm
plastic extremely thin quad flat package; no leads;
8 terminals; UTLP based; body 1.6 × 1.6 × 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.2 × 1.0 × 0.35 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 × 1.0 × 0.35 mm
001aah789
&
&
Marking code
p08
p08
pE
p08
p08
pE
pE
[1]
Low-power dual 2-input AND gate
Fig 3.
A
B
Logic diagram (one gate)
74AUP2G08
© NXP B.V. 2010. All rights reserved.
Version
SOT765-1
SOT833-1
SOT1089
SOT996-2
SOT902-1
SOT1116
SOT1203
mna221
2 of 21
Y