mk68901 STMicroelectronics, mk68901 Datasheet - Page 2

• Manufacturer Part Number: mk68901
• Description: Multi.function Peripheral
• Manufacturer: STMicroelectronics

MK68901
necessary control and status interface to the pro-
grammer.
The MFP is a derivative of the MK3801 STI, a Z80
family peripheral.
PIN DESCRIPTION
GND :
V
CS :
DS :
R/W :
DTACK : Data Transfer Acknowledge. (output, ac-
A1-A5 :
D0-D7 :
CLK :
RESET : Device reset. (input, active low). Reset
INTR :
2/33
CC
:
Ground
+5 volts ( 5%)
Chip Select (input, active, low). CS is u-
sed to select the MK68901 MFP for ac-
cesses to the internal registers. CS and
IACK must not be asserted at the same
time.
Data Strobe (input, active low). DS is u-
sed as part of the chip select and interrupt
acknowledge functions.
Read/Write (input). R/W is the signal
from the bus master indicating whether
the current bus cycle is a Read (High) or
Write (Low) cycle.
tive low, tri-stateable) DTACK is used to
signal the bus master that data is ready,
or that data has been accepted by the
MK68901 MFP.
Address Bus (inputs). The adress bus is
used to adress one of the internal regis-
ters during a read or write cycle.
Data Bus (bi-directional, tri-stateable).
The data bus is used to receive data from
or transmit data to one of the internal re-
gisters during a read or write cycle. It is
also used to pass a vector during an in-
terrupt acknowledge cycle.
Clock (input). This input is used to pro-
vide the internal timing for the MK68901
MFP.
disables the USART receiver and trans-
mitter, stops all timers and forces the ti-
mer outputs low, disables all interrupt
channels and clears any pending inter-
rupts. The General Purpose Interrupt/I/O
lines will be placed in the tri-state input
mode. All internal registers (except the ti-
mer, USART data registers, and transmit
status register) will be cleared.
Interrupt Request (output, active low, o-
pen drain). INTR is asserted when the
MK68901 MFP is requesting an interrupt.
INTR is negated during an interrupt ac-
IACK :
IEI :
IEO :
10-17 :
SO :
SI :
RC :
TC :
RR :
TR :
TAO,TBO,
TCO,TDO:
XTAL1,
XTAL2 :
knowledge cycle or by clearing the pen-
ding interrupt(s) through software.
Interrupt Acknowledge (input, active
low). IACK is used to signal the MK68901
MFP that the CPU is acknowledging an
interrupt. CS and IACk must not be as-
serted at the same time.
Interrupt Enable In (input, active low). IEI
is used to signal the MK68901 MFP that
no higher priority device is requesting in-
terrupt service.
Interrupt Enable Out (output, active low).
IEO is used to signal lower priority peri-
pherals that neither the MK68901 MFP
nor another higher priority peripheral is
requesting interrupt service.
General Purpose Interrupt I/O lines.
These lines may be used as interrupt in-
puts and/or I/O lines. When used as in-
terrupt inputs, their active edge is pro-
grammable. A data direction register is u-
sed to define which lines are to be Hi-Z
inputs and which lines are to be push-pull
TTL compatible outputs.
Serial Output. This is the output of the U-
SART transmitter.
Serial Input. This is the input to the U-
SART receiver.
Receiver Clock. This input controls the
serial bit rate of the USART receiver.
Transmitter Clock. This input controls the
serial bit rate of the USART transmitter.
Receiver Ready. (output, active low)
DMA output for receiver, which reflects
the status of Buffer Full in port number
15.
Transmitter Ready. (output, active low)
DMA output for transmitter, which re-
flects the status of Buffer Empty in port
number 16.
Timer Outputs. Each of the four timers
has an output which can produce a
square wave. The output will change
states each timer cycle ; thus one full pe-
riod of the timer out signal is equal to two
timer cycles. TAO or TBO can be reset
(logic ”O”) by a write to TACR, or TBCR
respectively.
Timer Clock inputs. A crystal can be
connected between XTAL1 and XTAL2,
or XTAL1 can be driven with a TTL level
clock. When driving XTAL1 with a TTL le-