88e3016 Marvell Semiconductor, Inc., 88e3016 Datasheet - Page 45

• Manufacturer Part Number: 88e3016
• Description: Integrated 10/100 Fast Ethernet Transceiver
• Manufacturer: Marvell Semiconductor, Inc.

2.14 IEEE 1149.1 Controller
The IEEE 1149.1 standard defines a test access port and boundary-scan architecture for digital integrated circuits
and for the digital portions of mixed analog/digital integrated circuits.
The standard provides a solution for testing assembled printed circuit boards and other products based on highly
complex digital integrated circuits and high-density surface-mounting assembly techniques.
The 88E3016 device implements six basic instructions: bypass, sample/preload, extest, clamp, HIGH-Z, and ID
CODE. Upon reset, ID_CODE instruction is selected. The instruction opcodes are shown in
Table 25:
The 88E3016 device reserves 5 pins called the Test Access Port (TAP) to provide test access Test Mode Select
Input (TMS), Test Clock Input (TCK), Test Data Input (TDI), and Test Data Output (TDO), and Test Reset Input
(TRSTn). To ensure race-free operation all input and output data is synchronous to the test clock (TCK). TAP input
signals (TMS and TDI) are clocked into the test logic on the rising edge of TCK, while output signal (TDO) is
clocked on the falling edge. For additional details refer to the IEEE 1149.1 Boundary Scan Architecture document.
2.14.1 Bypass Instruction
The bypass instruction uses the bypass register. The bypass register contains a single shift-register stage and is
used to provide a minimum length serial path between the TDI and TDO pins of the 88E3016 device. This allows
rapid movement of test data to and from other testable devices in the system.
The extest instruction allows circuitry external to the 88E3016 device (typically the board interconnections) to be
tested. Prior to executing the extest instruction, the first test stimulus to be applied is shifted into the boundary-
scan registers using the sample/preload instruction. Thus, when the change to the extest instruction takes place,
known data is driven immediately from the 88E3016 device to its external connections.
2.14.2 Sample/Preload Instruction
The sample/preload instruction allows scanning of the boundary-scan register without causing interference to the
normal operation of the 88E3016 device. Two functions are performed when this instruction is selected: sample
and preload.
Sample allows a snapshot to be taken of the data flowing from the system pins to the on-chip test logic or vice
versa, without interfering with normal operation. The snapshot is taken on the rising edge of TCK in the Capture-
DR controller state, and the data can be viewed by shifting through the component's TDO output.
While sampling and shifting data out through TDO for observation, preload allows an initial data pattern to be
shifted in through TDI and to be placed at the latched parallel output of the boundary-scan register cells that are
connected to system output pins. This ensures that known data is driven through the system output pins upon
Copyright © 2006 Marvell
May 4, 2006, Advance
In stru ction
EXTEST
SAMPLE/PRELOAD
CLAMP
HIGH-Z
BYPASS
ID CODE
TAP Controller Op Codes
O pC od e
00000000
00000001
00000010
00000011
11111111
00000100
Document Classification: Proprietary Information
CONFIDENTIAL
Doc. No. MV-S103164-00, Rev. --
IEEE 1149.1 Controller
Table
25.
Page 45