CS4239-JQ CIRRUS [Cirrus Logic], CS4239-JQ Datasheet - Page 68

• Manufacturer Part Number: CS4239-JQ
• Manufacturer: CIRRUS [Cirrus Logic]

The CS9236 data is sent to DAC2 which can be
summed into the input or output mixer. Volume
control for the serial port is supported through
I18 and I19 in the WSS register space.
ZVPORT SERIAL INTERFACE
The ZVPORT interface consists of three input
pins: ZLRCK, ZSCLK, and ZSDATA. ZLRCK
is the Left/Right clock indicating which channel
is currently being received. ZSCLK is the serial
bit clock where ZLRCK and ZSDATA change on
the falling edge and serial data is internally
latched on the rising edge. Note that the serial
data starts one ZSCLK period after ZLRCK tran-
sitions. Figure 10 illustrates the clocking on the
ZVPORT pins.
ZSDATA
68
ZLRCK
ZSCLK
MIDOUT
BRESET
Figure 11. CS9236 Wavetable Serial Port Interface
SDATA
LRCLK
MIDIN
MCLK
15 14 13 12 11 10
100
100k
Midi In
Joystick Connector
9 8 7
Left Channel
100k
Midi Out
6 5 4 3 2 1 0
Figure 10. ZVPORT Clocking Format
MCLK5I
LRCLK
SOUT
RST
PDN
MIDI_IN
CS9236
XTAL3I
The ZVPORT interface is enabled by setting
ZVEN in X18. The initial state of ZVEN on
power-up can be set from the Hardware Con-
figuration, Global Configuration Byte 2. Once
enabled, the ZVPORT interface is connected to
DAC2. When DAC2 is being used for ZVPORT,
it cannot be used for other devices such as
CS9236 Wavetable serial interface, CS4610 DSP
serial interface, or internal FM synthesizer. Vol-
ume control for the ZVPORT is supported
through I18 and I19 in the WSS register space.
An activity bit, ZVA, exists in the Global Status
register, CTRLbase+7 (or X30 in WSS space)
which is high when activity exists on the
ZVPORT. When the ZVPORT is enabled
(ZVEN = 1), the CS4239 automatically detects a
clock on the ZLRCK pin and switches to the
ZVPORT interface when the clock is present.
When the ZLRCK is not present, the CS4239
automatically switches back to FM/Wavetable.
WSS CODEC SOFTWARE DESCRIPTION
The WSS Codec must be in Mode Change En-
able Mode (MCE=1) before any changes to the
Interface Configuration register (I9) or the Sam-
ple Frequency (lower four bits) in the Fs &
Playback Data Format registers (I8) are allowed.
The actual audio data formats, which are the up-
per four bits of I8 for playback and I28 for
capture, can be changed by setting MCE (R0) or
PMCE/CMCE (I16) high. The exceptions are
CEN and PEN which can be changed "on-the-
fly" via programmed I/O writes. All outstanding
DMA transfers must be completed before new
values of CEN or PEN are recognized.
15 14 13 12 11 10
CrystalClear Portable ISA Audio System
9 8 7
Right Channel
TM
6 5 4 3 2 1 0
CS4239
DS253PP2