CS4239-JQ CIRRUS [Cirrus Logic], CS4239-JQ Datasheet - Page 88

• Manufacturer Part Number: CS4239-JQ
• Manufacturer: CIRRUS [Cirrus Logic]

CS9236 Wavetable Serial Port Interface
SDATA - Wavetable Serial Audio Data, Input
LRCLK - Wavetable Serial Left/Right Clock, Input
MCLK - Wavetable Master Clock, Output (CDROM Enable)
ZVPORT Serial Port Interface
ZSDATA - ZV Port Serial Data, Input
ZLRCLK - ZV Port Left/Right Clock, Input
ZSCLK - ZV Port Serial Clock, Input
88
A digital interface to the CS9236 Single-Chip Wavetable Music Synthesizer is provided that
allows the CS9236 PCM audio data to be summed on the CS4239 without the need for an
external DAC. This serial port is enabled via the WTEN bit which is located in the Global
Configuration byte in the E
Wavetable serial port pins are shared with the CS4610 DSP serial interface. If the CS4610 serial
interface is enabled, the CS9236 interface is not available (SPE takes precedence over WTEN).
This input supplies the serial audio PCM data to be mixed on the CS4239. The data consists of
left and right channel 16-bit data delineated by LRCLK. This pin should be connected to the
SOUT output pin on the CS9236. This pin should also have a weak pull-down resistor of
approx. 100 k
This input supplies the serial data alignment signal that delineates left from right data. This pin
should be connected to the LRCLK output pin on the CS9236. This pin should also have a
weak pull-down resistor of approx. 100 k
stuffing options.
This output supplies the 16.9344 MHz master clock that controls all the timing on the CS9236.
This pin should be connected to the MCLK5I input pin on the CS9236. MCLK can be disabled
in software using the DMCLK bit in C8 in the Control logical device space. DMCLK provides
a partial software power-down mode for the CS9236. At power-up, this pin is an input (with an
internal 100 k
CDROM interface (in lieu of the upper four ISA address pins). Loading must be limited to
CMOS inputs if this pin has the 10 k resistor attached.
When the ZV port is enabled, ZVEN = 1 in X18, this pin is the serial data input.
When the ZV port is enabled, ZVEN = 1 in X18, this pin is the Left/Right channel delineation
clock input.
When the ZV port is enabled, ZVEN = 1 in X18, this pin is the serial data bit clock input.
to minimize power-down currents and allow for stuffing options.
pullup) that, when pulled low with a 10 k
2
PROM Hardware Configuration data, or C8. The CS9236
to minimize power-down currents and allow for
CrystalClear Portable ISA Audio System
resistor to SGND, enables the
TM
CS4239
DS253PP2