C505-2RM SIEMENS [Siemens Semiconductor Group], C505-2RM Datasheet - Page 44

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C505-2RM

Manufacturer Part Number
C505-2RM
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Interrupt System
The C505 provides 12 interrupt vectors with four priority levels. Five interrupt requests can be
generated by the on-chip peripherals (timer 0, timer 1, timer 2, serial interface, A/D converter). One
interrupt can be generated by the CAN controller (C505C and C505CA only) or by a software setting
and in this case the interrupt vector is the same. Six interrupts may be triggered externally (P3.2/
INT0, P3.3/INT1, P1.0/AN0/INT3/CC0, P1.1/AN1/INT4/CC1, P1.2/AN2/INT5/CC2, P1.3/AN3/INT6/
CC3). Additionally, the P1.5/AN5/T2EX can trigger an interrupt. The wake-up from power-down
mode interrupt has a special functionality which allows to exit from the software power-down mode
by a short low pulse at either pin P3.2/INT0 or the pin P4.1/RXDC.
Figure 21 to 23 give a general overview of the interrupt sources and illustrate the request and the
control flags which are described in the next sections. Table 10 lists all interrupt sources with their
request flags and interrupt vectior addresses.
Table 10
Interrupt Source and Vectors
Interrupt Source
External Interrupt 0
Timer 0 Overflow
External Interrupt 1
Timer 1 Overflow
Serial Channel
Timer 2 Overflow / Ext. Reload
A/D Converter
CAN Controller / Software Interrupt 004B H
External interrupt 3
External Interrupt 4
External Interrupt 5
External interrupt 6
Wake-up from power-down mode
Semiconductor Group
Interrupt Vector Address
0003 H
000B H
0013 H
001B H
0023 H
002B H
0043 H
0053 H
005B H
0063 H
006B H
007B H
44
Interrupt Request Flags
IE0
TF0
IE1
TF1
RI / TI
TF2 / EXF2
IADC
– / SWI
IEX3
IEX4
IEX5
IEX6
C505A / C505CA
C505 / C505C
1997-12-01

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