C505-2RM SIEMENS [Siemens Semiconductor Group], C505-2RM Datasheet - Page 67

no-image

C505-2RM

Manufacturer Part Number
C505-2RM
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Notes:
1)
2) During the sample time the input capacitance
3) This parameter includes the sample time
4) T
5) During the conversion the ADC’s capacitance must be repeatedly charged or discharged. The internal
6) Not 100% tested, but guaranteed by design characterization.
Semiconductor Group
V
these cases will be X000
internal resistance of the analog source must allow the capacitance to reach their final voltage level within
After the end of the sample time
result.
calibration. Values for the conversion clock
the previous page.
other voltages within the defined voltage range.
If an overload condition occurs on maximum 2 unused analog input pins and the absolute sum of input
overload currents on all analog input pins does not exceed 10 mA, an additional conversion error of 1/2 LSB
is permissible.
resistance of the reference source must allow the capacitance to reach their final voltage level within the
indicated time. The maximum internal resistance results from the programmed conversion timing.
UE
AIN
is tested at
may exeed
V
V
AREF
AGND
= 5.0 V,
H
or
or X3FF
V
AREF
V
AGND
t
S
H
, changes of the analog input voltage have no effect on the conversion
up to the absolute maximum ratings. However, the conversion result in
, respectively.
= 0 V,
t
t
S
ADC
, the time for determining the digital result and the time for the
C
V
AIN
CC
depend on programming and can be taken from the table on
67
must be charged/discharged by the external source. The
= 4.9 V. It is guaranteed by design characterization for all
C505A / C505CA
C505 / C505C
1997-12-01
t
S
.

Related parts for C505-2RM