IR3081AM IRF [International Rectifier], IR3081AM Datasheet - Page 19

• Manufacturer Part Number: IR3081AM
• Description: XPHASETM VR 10 CONTROL IC
• Manufacturer: IRF [International Rectifier]

DESIGN PROCEDURES - IR3081A AND IR3086A CHIPSET
IR3081A EXTERNAL COMPONENTS
Oscillator Resistor Rosc
The oscillator of IR3081A generates a triangle waveform to synchronize the phase ICs, and the switching frequency
of the each phase converter equals the oscillator frequency, which is set by the external resistor R
the curve in Figure 13.
Soft Start Capacitor C
Because the capacitor C
over-current latch delay time, and power good delay time, they should be considered together while choosing
C
The SS/DEL pin voltage controls the slew rate of the converter output voltage, as shown in Figure 10. After the
ENABLE pin voltage rises above 0.6V, there is a soft-start delay time
released to allow the soft start. The soft start time
zero to V
Once C
delay time
and (4) respectively.
VDAC Slew Rate Programming Capacitor C
The slew rate of VDAC down-slope SR
Equation (5), where I
compensate VDAC circuit and is determined by Equation (6). The slew rate of VDAC up-slope SR
to that of VDAC down-slope and is given by Equation (7), where I
shown in Figure15.
SS/DEL
Page 19 of 39
SS/DEL
.
O.
t
t
VccPG
SS
can be programmed by an external capacitor, which is determined by Equation (1).
is chosen, the soft start delay time
from output voltage (V
C
t
t
t
C
R
SR
VccPG
SSDEL
OCDEL
SINK
VDAC
VDAC
SS
UP
SS/DEL
/
DEL
SS/DEL
=
=
=
is the sink current of VDAC pin as shown in Figure 15. The resistor R
=
=
=
I
C
C
0
C
=
SR
C
SOURCE
SS
5 .
SS
VDAC
I
SS
I
SINK
I
DOWN
CHG
/
+
/
I
/
OCDISCHG
DEL
DEL
programs four different time parameters, i.e. soft start delay time, soft start time,
CHG
DEL
3
V
2 .
C
O
*
*
1 *
VDAC
*
∗
t
3 (
SS
. 0
10
3 .
8 .
115
DOWN
I
−
=
=
2
−
O
CHG
15
) in regulation to Power Good are fixed and shown in Equations (2), (3)
70
C
. 0
=
SS
065
70
*
C
/
VDAC
10
DEL
*
can be programmed by the external capacitor C
SS
V
−
10
40
−
O
/
V
6
DEL
t
1 *
−
O
SS
*
6
*
t
and Resistor R
−
10
SSDEL,
3 .
t
*
SS
. 1
represents the time during which converter voltage rises from
. 0
−
) 3
6
115
=
the over-current fault latch delay time
C
SS
/
DEL
( *
VDAC
70
SOURCE
t
. 3
SSDEL,
*
735
10
−
−
6
V
after which the error amplifier output is
is the source current of VDAC pin as
O
−
. 1
) 3
(1)
(2)
(3)
(4)
(5)
(6)
(7)
VDAC
IR3081A
UP
1/31
OSC
t
VDAC
OCDEL
is proportional
as defined in
/05
according to
is used to
, and the