LTC1290BI LINER [Linear Technology], LTC1290BI Datasheet - Page 7

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LTC1290BI

Manufacturer Part Number
LTC1290BI
Description
Single Chip 12-Bit Data Acquisition System
Manufacturer
LINER [Linear Technology]
Datasheet

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PI FU CTIO S
D
word is shifted into this input after CS is recognized.
SCLK (Pin 18): Shift Clock. This clock synchronizes the
serial data transfer.
BLOCK DIAGRAM
TEST CIRCUITS
IN
U
(Pin 17): Digital Data Input. The A/D configuration
5V
U
V
D
On and Off Channel Leakage Current
CC
IN
COM
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
20
17
POLARITY
1
2
3
4
5
6
7
8
9
DGND
U
INPUT MUX
10
REGISTER
ANALOG
INPUT
SHIFT
I
I
ON
OFF
A
A
AGND
11
ON CHANNEL
SAMPLE-
OFF
CHANNELS
HOLD
AND-
LTC1290 • TC01
V
12
COMP
REF
CAPACITIVE
13
12-BIT
DAC
ACLK (Pin 19): A/D Conversion Clock. This clock controls
the A/D conversion process.
V
free of noise and ripple by bypassing directly to the analog
ground plane.
CC
(Pin 20): Positive Supply. This supply must be kept
REF
14
+
D
OUT
TEST POINT
Load Circuit for t
REGISTER
CONTROL
OUTPUT
TIMING
12-BIT
SHIFT
AND
SAR
100pF
3k
dis
LTC1290 • BD
18
16
19
15
and t
SCLK
D
ACLK
CS
OUT
en
5V WAVEFORM 2
LTC1290
WAVEFORM 1
LTC1290 • TC02
7

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