LTC1865 LINER [Linear Technology], LTC1865 Datasheet - Page 14

• Manufacturer Part Number: LTC1865
• Description: Ultra-Tiny, Differential, 16-Bit ADC with SPI Interface SPI Interface
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
LTC2452
PRESERVING THE CONVERTER ACCURACY
The LTC2452 is designed to minimize the conversion result’s
sensitivity to device decoupling, PCB layout, antialiasing
circuits, line and frequency perturbations. Nevertheless,
in order to preserve the high accuracy capability of this
part, some simple precautions are desirable.
Digital Signal Levels
Due to the nature of CMOS logic, it is advisable to keep input
digital signals near GND or V
0.5V to V
from the part. Undershoot and overshoot should also be
minimized, particularly while the chip is converting. It is
thus beneficial to keep edge rates of about 10ns and limit
overshoot and undershoot to less than 0.3V.
Noisy external circuitry can potentially impact the output
under 2-wire operation. In particular, it is possible to get
the LTC2452 into an unknown state if an SCK pulse is
missed or noise triggers an extra SCK pulse. In this situ-
ation, it is impossible to distinguish SDO = 1 (indicating
conversion in progress) from valid “1” data bits. As such,
CPOL = 1 is recommended for the 2-wire mode. The user
should look for SDO = 0 before reading data, and look
for SDO = 1 after reading data. If SDO does not return a
“0” within the maximum conversion time (or return a “1”
after a full data read), generate 16 SCK pulses to force a
new conversion.
Driving V
In relation to the V
internal high frequency decoupling with damping elements,
which reduce the ADC performance sensitivity to PCB
layout and external components. Nevertheless, the very
high accuracy of this converter is best preserved by careful
low and high frequency power supply decoupling.
A 0.1µF , high quality, ceramic capacitor in parallel with a
10µF ceramic capacitor should be connected between the
V
The 0.1µF capacitor should be placed closest to the ADC
package. It is also desirable to avoid any via in the circuit
path, starting from the converter V
14
CC
and GND pins, as close as possible to the package.
CC
CC
– 0.5V may result in additional current leakage
and GND
CC
and GND pins, the LTC2452 combines
CC
. Voltages in the range of
CC
pin, passing through
these two decoupling capacitors, and returning to the
converter GND pin. The area encompassed by this circuit
path, as well as the path length, should be minimized.
Furthermore, as shown in Figure 15, GND is used as the
negative reference voltage. It is thus important to keep the
GND line quiet and connect GND through a low-imped-
ance trace.
Very low impedance ground and power planes, and star
connections at both V
The V
first to the decoupling capacitors described above, and
the second to the ground return for the power supply
voltage source.
Driving REF
A simplified equivalent circuit for REF is shown in Figure
15. Like all other A/D converters, the LTC2452 is only
as accurate as the reference it is using. Therefore, it is
important to keep the reference line quiet by careful low
and high frequency decoupling.
Figure 15. LTC2452 Analog Input/Reference Equivalent Circuit
CC
pin should have two distinct connections: the
GND
REF
IN –
IN
+
I
I
I
I
I
I
I
I
LEAK
LEAK
LEAK
LEAK
LEAK
LEAK
LEAK
LEAK
V
V
V
V
CC
CC
CC
CC
CC
and GND pins, are preferable.
(TYP)
(TYP)
(TYP)
(TYP)
R
R
R
R
15k
15k
15k
15k
SW
SW
SW
SW
2452 F15
C
0.35pF
(TYP)
EQ
2452fc