LTC1865 LINER [Linear Technology], LTC1865 Datasheet - Page 6

• Manufacturer Part Number: LTC1865
• Description: Ultra-Tiny, Differential, 16-Bit ADC with SPI Interface SPI Interface
• Manufacturer: LINER [Linear Technology]

PIN FUNCTIONS
LTC2452
SCK (Pin 1): Serial Clock Input. SCK synchronizes the serial
data output. While digital data is available (the ADC is not
in CONVERT state) and CS is LOW (ADC is not in SLEEP
state) a new data bit is produced at the SDO output pin
following every falling edge applied to the SCK pin.
GND (Pin 2): Ground. Connect to a ground plane through
a low impedance connection.
REF (Pin 3): Reference Input. The voltage on REF can have
any value between 2.5V and V
sets the full-scale range.
V
(Pin 2) with a 10µF capacitor in parallel with a low-se-
ries-inductance 0.1µF capacitor located as close to the
LTC2452 as possible.
BLOCK DIAGRAM
APPLICATIONS INFORMATION
CONVERTER OPERATION
Converter Operation Cycle
The LTC2452 is a low power, fully differential, delta-sigma
analog-to-digital converter with a simple 3-wire SPI in-
terface (see Figure 1). Its operation is composed of three
successive states: CONVERT, SLEEP and DATA OUTPUT.
6
CC
(Pin 4): Positive Supply Voltage. Bypass to GND
6
5
CC
IN
IN
+
–
. The reference voltage
A/D CONVERTER
A/D CONVERTER
2, 9
16-BIT ΔΣ
16-BIT ΔΣ
3
Figure 1. Functional Block Diagram
REF
GND
–
DECIMATING
SINC FILTER
IN
CS (Pin 7): Chip Select (Active LOW) Digital Input. A
LOW on this pin enables the SDO digital output. A HIGH
on this pin places the SDO output pin in a high imped-
ance state.
SDO (Pin 8): Three-State Serial Data Output. SDO is used
for serial data output during the DATA OUTPUT state and
can be used to monitor the conversion status.
Exposed Pad (Pin 9): Ground. Must be soldered to PCB
ground. For prototyping purposes, this pad may remain
floating.
The operating cycle begins with the CONVERT state, is
followed by the SLEEP state, and ends with the DATA OUT-
PUT state (see Figure 2). The 3-wire interface consists of
serial data output (SDO), serial clock input (SCK), and the
active low chip select input (CS).
The CONVERT state duration is determined by the LTC2452
conversion time (nominally 16.6 milliseconds). Once
4
–
V
CC
(Pin 5), IN
OSCILLATOR
INTERFACE
INTERNAL
+
SPI
(Pin 6): Differential Analog Input.
SDO
SCK
CS
2452 BD
7
8
1
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