LTC1909-8 LINER [Linear Technology], LTC1909-8 Datasheet - Page 16

• Manufacturer Part Number: LTC1909-8
• Description: Wide Operating Range,No RSENSE TM Step-Down DC/DC Controller with SMBus Programming
• Manufacturer: LINER [Linear Technology]

OPERATIO
LTC1909-8
on or off accidentally. In both On and Off protocols, the
LTC1909-8 does not latch in the Data Low and Data High
bytes. This protects the settings that have already been
loaded into the registers and verified by read-back. Once
the converter is turned on (both SMBON and VRON are
high) the contents of Registers 0 and 1 are protected and
can only be altered with Setup protocols if VRON is pulled
low or two Off protocols are sent to the LTC1909-8 (to
force SMBON low). During Read-Back, the microproces-
sor can check the On or Off state of the controller by testing
the DCON status bit that follows each 5-bit code. This bit
is low only when both SMBON and VRON are high.
Resistor Divider
The resistor divider settings comply with the Intel Desktop
VRM8.4 VID Specifications. The divider consists of a fixed
20k (typical) resistor, R
and FB pins and a variable resistor, R
The FB pin is connected to the V
controller to set the output voltage of the converter. Each
resistor has a tolerance of 30% but the divider ratio is
accurate to 0.35%. The error budget for the DC/DC con-
verter output voltage must include the 0.35% ratio toler-
ance and the 1% tolerance in the 0.8V reference. The
output of the DC/DC converter is given by:
where V
converter. Table 2 shows the 32 possible converter output
voltages. The microprocessor controls the SEL pin to se-
lect the contents of one of the registers as the active divider
setting. The SEL pin has a trip point of 1.3V with 50mV
of hysteresis and is TTL compatible. It controls an internal
10:5 digital multiplexer and selects the contents of register
0 when pulled low and register 1 when pulled high. When
SEL is toggled, and the new converter output is lower or
greater by 7.5%, the overvoltage and undervoltage com-
parators of the controller may trip causing the PGOOD pin
of the controller to go low. This condition will recover
automatically as the converter charges up the output or
allows the output to drop to the new voltage setting.
Power Good Timer
The PGTMR or “Power Good Timer” pin is also an open-
drain, N-channel output. It pulls low if the DC/DC converter
16
V
OUT
REF
= V
REF
= 0.8V is the internal reference voltage of the
• (R
U
FB2
(Refer to Functional Diagram)
FB1
+ R
, connected between the V
FB1
)/R
FB2
FB
pin of the step-down
FB2
, from FB to GND.
OSENSE
Table 2. DC/DC Converter Output Voltage
is in shutdown or on power-up. When the converter is
turned on, an internal timer keeps PGTMR low for 50 s
(typical) which allows time for the converters to enter regu-
lation. Toggling the SEL pin while the converter is turned
on also causes the PGTMR pin to pull low for 50 s.
The PGTMR pin may be used to force continuous opera-
tion in the DC/DC converter. If the SEL pin is toggled to
select a lower output voltage, if may take an unacceptably
VID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
VID2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
VID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
VID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
OUTPUT VOLTAGE
2.05V
2.00V
1.95V
1.90V
1.85V
1.80V
1.75V
1.70V
1.65V
1.60V
1.55V
1.50V
1.45V
1.40V
1.35V
1.30V
3.50V
3.40V
3.30V
3.20V
3.10V
3.00V
2.90V
2.80V
2.70V
2.60V
2.50V
2.40V
2.30V
2.20V
2.10V
2.00V
19098f