LTC1909-8 LINER [Linear Technology], LTC1909-8 Datasheet - Page 26

• Manufacturer Part Number: LTC1909-8
• Description: Wide Operating Range,No RSENSE TM Step-Down DC/DC Controller with SMBus Programming
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
LTC1909-8
26
By positioning the output voltage 60mV above the regula-
tion point at no load, it will only drop 65mV below the
regulation point after the load step, well within the 100mV
tolerance. Implementing active voltage positioning re-
quires setting a precise gain between the sensed current
and the output voltage. Because of the variability of
MOSFET on-resistance, it is prudent to use a sense resis-
tor with active voltage positioning. In order to minimize
power lost in this resistor, a low value is chosen of 0.003 .
The nominal sense voltage will now be:
To maintain a reasonable current limit, the voltage on the
V
sponding to a 50mV nominal sense voltage.
Next, the gain of the LTC1909-8 error amplifier must be
determined. The change in I
change in the output current is:
The corresponding change in the output voltage is deter-
mined by the gain of the error amplifier and feedback
divider. The LTC1909-8 error amplifier has a transconduc-
tance g
R
set for accurate active voltage positioning.
Solving for this resistance value:
The gain setting resistance R
resistors, R
connected from I
RNG
40mV input range. Thus, by connecting a load resistance
VP
V
R
SNS(NOM)
to the I
VP
I
I
TH
TH
pin is reduced to its minimum value of 0.5V, corre-
m
that is constant over both temperature and a wide
( . )( .
( . )
g R
0 8
0 8
TH
24 0 003
m VP
VP1
V
12
RNG
V
pin, the error amplifier gain can be precisely
= (0.003 )(15A) = 45mV
V g
V
OUT
( . )( .
V
1 5
connected from I
.
TH
1 7
m
U
R
V
0 8 .
V
to INTV
I
SENSE
OUT
mS
TH
V
1 08
V
OUT
)(
U
15
125
TH
V
CC
V
A
I
)
VP
OUT
OUT
voltage for a corresponding
mV
. The parallel combination
is implemented with two
TH
1 08
)
W
.
to ground and R
9 53
V
.
k
U
VP2
of these resistors must equal R
mines nominal value of the I
amplifier input is zero. To center the load line around the
regulation point, the I
correspond to half the output current. The relation be-
tween I
Solving for the required values of the resistors:
The modified circuit is shown in Figure 8. Figures 9 and 10
show the transient response without and with active
voltage positioning. Both circuits easily stay within 100mV
of the 1.5V output. However, the circuit with active voltage
positioning accomplishes this with only three output ca-
pacitors rather than five. Refer to Design Solutions 10 for
additional information about active voltage positioning.
SMBus Protocols
The Write Word and Read Word protocols (Figure 11)
share three common features. First, the 7-bit slave ad-
dress for both protocols is internally hardwired to 1110
001B = E2H. A single R/W bit follows the slave address.
This bit is low for data transfer from the microprocessor
to the LTC1909-8 and high for transfers in the opposite
direction.
Second, the LTC1909-8 decodes only the three most
significant bits of the 8-bit command code. Table 3 shows
the four valid combinations. All other combinations are
ignored.
I
R
R
TH NOM
VP
VP
(
1
2
TH
voltage and the output current is:
)
12 44
5
I
TH NOM
V I
.
5
(
1 17
–
V
.
0 5
V
12
12
5
k
TH NOM
RNG
.
V
V
)
V
V
(
V
R
VP
R
0 003
TH
)
SENSE OUT
.
R
VP
pin voltage must be set to
1 17
TH
.
5
pin voltage when the error
V
I
VP
V
5
7 5
V
9 53
.
and their ratio deter-
.
– .
–
A
5
1 17
2
1
V
–
k
2
1
I
L
4 7
V
40 73
.
9 53
.
A
.
0 8
.
k
k
V
0 8
19098f
.
V