SC16C2550B_07 PHILIPS [NXP Semiconductors], SC16C2550B_07 Datasheet - Page 8

• Manufacturer Part Number: SC16C2550B_07
• Description: 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
Table 3.
SC16C2550B_4
Product data sheet
Symbol
DSRA
DSRB
DTRA
DTRB
RIA
RIB
RTSA
RTSB
RXA
RXB
TXA
TXB
n.c.
Pin
HVQFN32 DIP40 PLCC44 LQFP48
-
-
-
-
-
-
23
15
4
3
5
6
-
Pin description
37
22
33
34
39
23
32
24
10
9
11
12
-
…continued
41
25
37
38
43
26
36
27
11
10
13
14
-
39
20
34
35
41
21
33
22
5
4
7
8
12, 24,
25, 37
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
Rev. 04 — 15 February 2007
Type
I
I
O
O
I
I
O
O
I
I
O
O
-
Description
Data Set Ready (active LOW). These inputs are associated
with individual UART channels, A through B. A logic 0 on this
pin indicates the modem or data set is powered-on and is ready
for data exchange with the UART. This pin has no effect on the
UART’s transmit or receive operation.
Data Terminal Ready (active LOW). These outputs are
associated with individual UART channels, A through B.
A logic 0 on this pin indicates that the SC16C2550B is
powered-on and ready. This pin can be controlled via the
Modem Control Register. Writing a logic 1 to MCR[0] will set
the DTR output to logic 0, enabling the modem. This pin will be
a logic 1 after writing a logic 0 to MCR[0] or after a reset. This
pin has no effect on the UART’s transmit or receive operation.
Ring Indicator (active LOW). These inputs are associated
with individual UART channels, A through B. A logic 0 on this
pin indicates the modem has received a ringing signal from the
telephone line. A logic 1 transition on this input pin will generate
an interrupt.
Request to Send (active LOW). These outputs are associated
with individual UART channels, A through B. A logic 0 on the
RTS pin indicates the transmitter has data ready and waiting to
send. Writing a logic 1 in the Modem Control Register MCR[1]
will set this pin to a logic 0, indicating data is available. After a
reset this pin will be set to a logic 1. This pin has no effect on
the UART’s transmit or receive operation.
Receive data A, B. These inputs are associated with individual
serial channel data to the SC16C2550B receive input circuits,
A and B. The RX signal will be a logic 1 during reset, idle (no
data) or when the transmitter is disabled. During the local
Loop-back mode, the RX input pin is disabled and TX data is
connected to the UART RX input, internally.
Transmit data A, B. These outputs are associated with
individual serial transmit channel data from the SC16C2550B.
The TX signal will be a logic 1 during reset, idle (no data) or
when the transmitter is disabled. During the local Loop-back
mode, the TX output pin is disabled and TX data is internally
connected to the UART RX input.
not connected
SC16C2550B
© NXP B.V. 2007. All rights reserved.
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