AD7545AN Intersil Corporation, AD7545AN Datasheet - Page 3

• Manufacturer Part Number: AD7545AN
• Description: 12-Bit/ Buffered/ Multiplying CMOS DAC
• Manufacturer: Intersil Corporation

Electrical Specifications
NOTES:
Timing Diagrams
REFERENCE INPUT
Input Resistance (Pin 19 to GND)
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance
SWITCHING CHARACTERISTICS (Note 4)
Chip Select to Write Setup Time, t
Chip Select to Write Hold Time, t
Write Pulse Width, t
Data Setup Time, t
Data Hold Time, t
POWER SUPPLY CHARACTERISTICS
I
2. Temperature Ranges as follows: J, K versions:
3. This includes the effect of 5ppm maximum gain TC.
4. Parameter not tested. Parameter guaranteed by design, simulation, or characterization.
5. DB0 - DB11 = 0V to V
6. Feedthrough can be further reduced by connecting the metal lid on the ceramic package to DGND.
7. Logic inputs are MOS gates. Typical input current (25
8. Typical values are not guaranteed but reflect mean performance specification.
DD
(DB0 - DB11)
DB0 - DB11
WR, CS
T
Specifications subject to change without notice.
A
SELECT
DATA IN
= 25
WRITE
CHIP
PARAMETER
o
C for TYP Specifications. MIN and MAX are measured over the specified operating range.
FIGURE 1A. TYPICAL WRITE CYCLE
IN
DH
DS
WR
IL
IH
DD
or V
CH
CS
t
DATA VALID
CS
t
DD
WR
t
T
DS
A
Input Resistance
TC = -300ppm/
Typical Input Resistance = 11k
V
V
V
See Figure 1
See Figure 1
t
See Figure 1
See Figure 1
All Digital Inputs V
All Digital Inputs 0V or V
All Digital Inputs 0V or V
A, B versions: -20
S version:
to 0V in plastic and sidebraze package.
CS
= See Note 2, V
IN
IN
IN
= 0 or V
= 0 (Note 4)
= 0 (Note 4)
t
TEST CONDITIONS
WR
t
FIGURE 1. WRITE CYCLE TIMING DIAGRAM
CH
t
DH
, t
CH
DD
o
-55
(Note 7)
C (Typ)
0, See Figure 1
REF
0
IL
o
o
o
C to 70
C to 85
C to 125
o
or V
C) is less than 1nA.
= +10V, V
V
0
V
0
V
0
DD
DD
IH
DD
DD
DD
AD7545
o
o
C
C
o
10-12
C
OUT1
MIN
380
400
210
2.4
10
(DB0 - DB11)
7
0
-
-
-
-
-
-
-
= 0V, AGND = DGND, Unless Otherwise Specified (Continued)
1
SELECT
DATA IN
V
WRITE
DD
CHIP
TYP
200
175
100
100
FIGURE 1B. PREFERRED WRITE CYCLE
10
= +5V
-
-
-
-
-
-
-
-
-
-
MAX
500
0.8
25
20
10
7
2
-
-
-
-
-
-
-
-
MIN
200
240
120
DATA VALID
10
7
0
-
-
-
-
-
-
-
-
1
t
CS
t
t
WR
DS
V
DD
TYP
120
100
100
10
= +15V
60
-
-
-
-
-
-
-
-
-
-
t
CH
t
DH
MAX
13.5
500
1.5
25
20
10
7
2
-
-
-
-
-
-
UNITS
A (Max)
mA
k
k
pF
pF
ns
ns
ns
ns
ns
V
0
V
0
V
0
V
V
A
A
DD
DD
DD