CY7C1370C Cypress, CY7C1370C Datasheet - Page 2

• Manufacturer Part Number: CY7C1370C
• Description: 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
• Manufacturer: Cypress

Document #: 38-05233 Rev. *D
Selection Guide
Logic Block Diagram-CY7C1372C (1M x 18)
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Shaded areas contain advance information. Please contact your local Cypress sales representative for availability of these parts.
CEN
CLK
A0, A1, A
ADV/LD
MODE
BW
BW
ZZ
C
WE
CE1
CE2
CE3
OE
a
b
WRITE ADDRESS
REGISTER 1
REGISTER 0
ADDRESS
Control
CY7C1370C-250
CY7C1372C-250
READ LOGIC
Sleep
AND DATA COHERENCY
WRITE REGISTRY
CONTROL LOGIC
350
WRITE ADDRESS
2.6
ADV/LD
70
REGISTER 2
C
A1
A0
D1
D0
BURST
LOGIC
Q1
Q0
CY7C1370C-225
CY7C1372C-225
A0'
A1'
DRIVERS
WRITE
325
2.8
70
MEMORY
REGISTER 1
ARRAY
INPUT
E
CY7C1370C-200
CY7C1372C-200
M
S
E
N
S
E
A
P
S
300
3.0
O
U
U
R
G
R
E
70
T
P
T
E
S
T
E
S
I
REGISTER 0
INPUT
D
A
A
R
N
G
T
S
T
E
E
I
E
O
U
U
U
T
P
T
B
F
F
E
R
S
E
CY7C1370C-167
CY7C1372C-167
CY7C1370C
CY7C1372C
DQs
DQP
DQP
275
3.4
70
a
b
Page 2 of 27
Unit
mA
mA
ns