W83194R-17A Winbond, W83194R-17A Datasheet - Page 10

no-image

W83194R-17A

Manufacturer Part Number
W83194R-17A
Description
100MHZ AGP CLOCK FOR SIS CHIPSET
Manufacturer
Winbond
Datasheet
8.3.2 Register 1 : CPU , 48/24 MHz Clock Register (1 = Active, 0 = Inactive)
8.3.3 Register 2: PCI Clock Register(1 = Active, 0 = Inactive)
8.3.4 Register 3: SDRAM Clock Register (1 = Active, 0 = Inactive)
Bit
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
@PowerUp
@PowerUp
@PowerUp
1
1
1
1
1
1
1
1
x
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Pin
Pin
Pin
40
41
43
44
15
13
12
11
10
28
29
31
32
34
35
37
38
7
8
-
-
-
-
-
Reserved
Reserved
Reserved
Reserved
CPUCLK3 (Active / Inactive)
CPUCLK2 (Active / Inactive)
CPUCLK1 (Active / Inactive)
CPUCLK0 (Active / Inactive)
Reserved
PCICLK_F (Active / Inactive)
AGP0 (Active / Inactive)
PCICLK4 (Active / Inactive)
PCICLK3 (Active / Inactive)
PCICLK2 (Active / Inactive)
PCICLk1 (Active / Inactive)
PCICLK0 (Active / Inactive)
SDRAM7 (Active / Inactive)
SDRAM6 (Active / Inactive)
SDRAM5 (Active / Inactive)
SDRAM4 (Active / Inactive)
SDRAM3 (Active / Inactive)
SDRAM2 (Active / Inactive)
SDRAM1 (Active / Inactive)
SDRAM0 (Active / Inactive)
- 10 -
Description
Description
Description
Publication Release Date: Sep. 1998
W83194R-17/-17A
PRELIMINARY
Revision 0.20

Related parts for W83194R-17A