CS51311GD14 Cherry Semiconductor Corporation, CS51311GD14 Datasheet - Page 18

• Manufacturer Part Number: CS51311GD14
• Description: Synchronous CPU Buck Controller for 12V and 5V Applications
• Manufacturer: Cherry Semiconductor Corporation

The input filter inductor may not be required because bulk
filter and bypass capacitors, as well as other loads located
on the board will tend to reduce regulator di/dt effects on
the circuit board and input power supply. Placement of the
power component to minimize routing distance will also
help to reduce emissions.
When laying out the CPU buck regulator on a printed cir-
cuit board, the following checklist should be used to
ensure proper operation of the CS51311.
1) Rapid changes in voltage across parasitic capacitors and
abrupt changes in current in parasitic inductors are major
concerns for a good layout.
2) Keep high currents out of sensitive ground connections.
3) Avoid ground loops as they pick up noise. Use star or
single point grounding.
4) For high power buck regulators on double-sided PCBs a
single ground plane (usually the bottom) is recommended.
5) Even though double sided PCBs are usually sufficient
for a good layout, four-layer PCBs are the optimum
approach to reducing susceptibility to noise. Use the two
internal layers as the Power and Gnd planes, the top layer
for the power connections, and component vias, and the
bottom layer for noise sensitive traces.
6) Keep the inductor switching node small by placing the
output inductor, switching and synchronous FETs close
together.
Layout Guidelines
Application Information: continued
18
7) The MOSFET gate traces to the IC must be as short,
straight, and wide as possible.
8) Use fewer, but larger output capacitors, keep the capaci-
tors clustered, and use multiple layer traces with heavy
copper to keep the parasitic resistance low.
9) Place the switching MOSFET as close to the +5V input
capacitors as possible.
10) Place the output capacitors as close to the load as
possible.
11) Place the V
the V
12) Place the C
to the C
13) Place the current limit filter capacitor between the V
and V
14) Connect the filter components of the following pins:
V
trace, and connect this local Gnd trace to the output capaci-
tor Gnd.
15) The “Droop” Resistor (embedded PCB trace) has to be
wide enough to carry the full load current.
16) Place the V
the IC.
FB
, V
FB
OUT
OUT
and V
OFF
, C
pins, as close as possible to the pins.
and COMP pins.
OFF
OUT
OFF
FB
CC
, and COMP to the Gnd pin with a single
,V
bypass capacitor as close as possible to
pins as close as possible to the pins.
and COMP capacitor as close as possible
OUT
filter resistors (510Ω) in series with
FB