CS51311GD14 Cherry Semiconductor Corporation, CS51311GD14 Datasheet - Page 6

• Manufacturer Part Number: CS51311GD14
• Description: Synchronous CPU Buck Controller for 12V and 5V Applications
• Manufacturer: Cherry Semiconductor Corporation

V
The V
erated by the ESR of the output capacitors. This ramp is
proportional to the AC current through the main inductor
and is offset by the value of the DC output voltage. This
control scheme inherently compensates for variation in
either line or load conditions, since the ramp signal is gen-
erated from the output voltage itself. This control scheme
differs from traditional techniques such as voltage mode,
which generates an artificial ramp, and current mode,
which generates a ramp from inductor current.
The V
put voltage is used to generate both the error signal and
the ramp signal. Since the ramp signal is simply the output
Figure 2: Gate(H) and Gate(L) Risetime vs. Load Capacitance.
Figure 1: Gate(H) and Gate(L) Falltime vs. Load Capacitance.
150
125
100
2
150
125
100
75
50
25
TM
75
50
25
0
0
−0.05
−0.10
−0.15
0
0.10
0.05
0
Control Method
2
2
Figure 3: DAC Output Voltage vs. Temperature,
0
TM
TM
0
V
T
V
T
method of control uses a ramp signal that is gen-
control method is illustrated in Figure 6. The out-
CC
A
A
CC
2000
2000
= 25°C
= 25°C
= 12V
= 12V
V
CC
20
4000
4000
= 12V
Theory Of Operation
DAC Code = 00001.
Junction Temperature (°C)
Load Capacitance (pF)
Load Capacitance (pF)
6000
40
6000
8000
8000
60
10000
10000
80
12000
12000
Typical Performance Characteristics
100
14000
14000
Application Information
120
16000
16000
6
Figure 6: V
−0.05
−0.10
−0.15
−0.20
−0.25
−0.05
−0.10
−0.15
−0.20
0.10
0.05
0.35
0.30
0.25
0.20
0.15
0.10
0.05
COMP
0
0
1.325 1.375 1.425 1.475 1.525 1.575 1.625 1.675 1.725 1.775 1.825 1.875 1.925 1.975 2.025 2.075
2.125 2.225 2.325 2.425 2.525 2.625 2.725 2.825 2.925 3.025 3.125 3.225 3.335 3.425 3.525
Figure 4: Percent Output Error vs. DAC Output
Figure 5: Percent Output Error vs. DAC Output
2
TM
Control Diagram
Ramp Signal
Voltage Setting, V
Voltage Setting, V
DAC Output Voltage Setting (V)
+
Signal
–
Error
PWM
Comparator
DAC Output Voltage Setting (V)
C
Amplifier
Error
GATE(H)
GATE(L)
E
+
–
ID4
ID4
= 0.
= 1.
Reference
Output
Voltage
Feedback
V
Voltage
V
T
V
FB
A
CC
ID4
= 25°C
= 12V
= 0
V
T
V
A
CC
ID4
= 25°C
= 12V
= 1