DAC7802K Burr-Brown Corporation, DAC7802K Datasheet - Page 4

• Manufacturer Part Number: DAC7802K
• Description: Dual Monolithic CMOS 12-Bit Multiplying DIGITAL-TO-ANALOG CONVERTERS
• Manufacturer: Burr-Brown Corporation

DAC7800
LOGIC TRUTH TABLE
DATA INPUT FORMAT
BLOCK DIAGRAM
X = Don’t care.
CLK
Data In
DAC B
X
X
X
X
X
MSB
CLK
Bit 0
CLK
DAC7800
5
UPD A
Bit 1
V
CS
12
Bit 11
Bit 12
Bit 23
8
DD
X
X
X
0
1
0
Bit 0
®
Bit 2
Data
7
In
UPD B
DAC7800, 01, 02
UPD B
UPD A
Data In
means falling edge triggered.
X
X
X
1
0
0
CLK
Bit 3
CLR
11
Bit 4
DAC A Register
CS
DAC B Register
X
LSB
1
0
0
0
0
Bit
23
DAC A
DAC B
Bit 5
12
12
12
12
CLR
X
0
1
1
1
1
Bit 6
DGND
DAC A Register
9
FUNCTION
All register contents set to 0’s (asynchronous).
No data transfer.
Input data is clocked into input register (location Bit 23) and previous data shifts.
Input register bits 23 (LSB)—12 (MSB) are loaded into DAC A.
Input register bits 11 (LSB)—0 (MSB) are loaded into DAC B.
Input register bits 23 (LSB)—12 (MSB) are loaded into DAC A, and input register bits 11 (LSB)—0 (MSB)
are loaded into DAC B.
Bit 7
Bit 8
DAC7800 Digital Interface Block Diagram
10
15
16
14
13
4
3
2
1
6
Bit 9
DAC7800 Data Input Sequence
UPD B
I
AGND B
R
V
V
R
I
AGND A
UPD A
OUT B
OUT A
FB B
REF A
REF B
FB A
MSB
Bit
12
Bit 10
DAC B
Shift Register
LSB
Bit 11
24-Bit
4
Bit 12
MSB
DAC A
PIN CONFIGURATION
Bit 13
LSB
Bit
11
AGND A
Bit 14
Data In
UPD A
V
I
R
OUT A
REF A
CLK
FB A
CS
Bit 15
DAC B Register
1
2
3
4
5
6
7
8
Bit 16
Bit 17
DAC7800
Top View
DIP
Bit 18
MSB
Bit
Bit 19
0
Bit 20
16
15
14
13
12
11
10
9
AGND B
I
R
V
V
CLR
UPD B
DGND
OUT B
Bit 21
REF B
FB B
DD
Bit 22
DAC A
Bit 23
LSB