DAC7802K Burr-Brown Corporation, DAC7802K Datasheet - Page 9

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DAC7802K

Manufacturer Part Number
DAC7802K
Description
Dual Monolithic CMOS 12-Bit Multiplying DIGITAL-TO-ANALOG CONVERTERS
Manufacturer
Burr-Brown Corporation
Datasheet

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DGND should be connected together at one point only,
preferably at the power supply ground point. Separate returns
minimize current flow in low-level signal paths if properly
connected. Output op amp analog common (+ input) should
be connected as near to the AGND pins of the DAC780X as
possible.
WIRING PRECAUTIONS
To minimize AC feedthrough when designing a PC board,
care should be taken to minimize capacitive coupling be-
tween the V
coupling between DACs may compromise the channel-to-
channel isolation. Coupling from any of the digital control or
data lines might degrade the glitch and digital crosstalk
performance. Solder the DAC780X directly into the PC
board without a socket. Sockets add parasitic capacitance
(which can degrade AC performance).
AMPLIFIER OFFSET VOLTAGE
The output amplifier used with the DAC780X should have
low input offset voltage to preserve the transfer function
linearity. The voltage output of the amplifier has an error
component which is the offset voltage of the op amp multi-
plied by the “noise gain” of the circuit. This “noise gain” is
equal to (R
D/A I
ance. The nonlinearity occurs due to the output impedance
varying with code. If the 0 code case is excluded (where R
= infinity), the R
gain” variation between 4/3 and 2. In addition, the variation
of R
at major code transitions where the worst differential
nonlinearity is also likely to be experienced. The nonlinearity
seen at the amplifier output is 2V
Thus, to maintain good nonlinearity the op amp offset should
be much less than 1/2LSB.
UNIPOLAR CONFIGURATION
Figure 3 shows DAC780X in a typical unipolar (two-quad-
rant) multiplying configuration. The analog output values
versus digital input code are listed in Table II. The opera-
tional amplifiers used in this circuit can be single amplifiers
such as the OPA602, or a dual amplifier such as the OPA2107.
C1 and C2 provide phase compensation to minimize settling
time and overshoot when using a high speed operational
amplifier.
If an application requires the D/A to have zero gain error, the
circuit shown in Figure 4 may be used. Resistors R2 and R4
induce a positive gain error greater than worst-case initial
negative gain error. Trim resistors R1 and R3 provide a
variable negative gain error and have sufficient trim range to
correct for the worst-case initial positive gain error plus the
error produced by R2 and R4.
BIPOLAR CONFIGURATION
Figure 5 shows the DAC780X in a typical bipolar (four-
quadrant) multiplying configuration. The analog output val-
ues versus digital input code are listed in Table III.
O
OUT
is nonlinear with code, and the largest steps in R
terminal and R
F
REF
/ R
O
lines and the I
+ 1) where R
O
will vary from R to 3R providing a “noise
F
is the feedback network imped-
O
OUT
is the output impedance of the
lines. Similarly, capacitive
OS
– 4V
OS
/3 = 2V
O
occur
OS
/3.
O
9
TABLE II. Unipolar Output Code.
FIGURE 4. Unipolar Configuration with Gain Trim.
The operational amplifiers used in this circuit can be single
amplifiers such as the OPA602, a dual amplifier such as the
OPA2107, or a quad amplifier like the OPA404. C1 and C2
provide phase compensation to minimize settling time and
overshoot when using a high speed operational amplifier.
The bipolar offset resistors R5–R7 and R8–R10 should be
ratio-matched to 0.01% to ensure the specified gain error
performance.
FIGURE 3. Unipolar Configuration.
1µF
1µF
C
C
D
D
MSB
DGND
+
+
+5V
+5V
1111 1111 1111
1000 0000 0000
0000 0000 0001
0000 0000 0000
DGND
DATA INPUT
V
V
DAC780X
DAC780X
DD
DD
V
REF A
DAC A
DAC B
DAC A
DAC B
V
V
V
IN A
V
V
IN B
REF B
REF A
REF B
R
100
R
100
DAC7800, 01, 02
1
3
LSB
R
I
R
I
A1, A2 OPA602 or 1/2 OPA2107.
DAC7802 has a single analog
common, AGND.
AGND A
AGND B
R
I
AGND A
R
I
AGND B
A1, A2 OPA602 or 1/2 OPA2107.
DAC7802 has a single analog
common, AGND.
OUT A
OUT B
OUT A
OUT B
FB A
FB B
FB A
FB B
–V
–V
–V
0 Volts
REF
REF
REF
47
47
ANALOG OUTPUT
R
R
2
4
(4095/4096)
(2048/4096) = –1/2V
(1/4096)
C1
10pF
C2
10pF
C1 10pF
C2 10pF
+
+
+
+
A1
A2
A1
A2
V
V
V
V
OUT A
OUT B
OUT A
OUT B
REF
®

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