SAA7184 Philips Semiconductors, SAA7184 Datasheet - Page 19

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SAA7184

Manufacturer Part Number
SAA7184
Description
Digital Video Encoders DENC2-M6
Manufacturer
Philips Semiconductors
Datasheet

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Table 21 Subaddress 6C
Table 22 Logic levels and function of SRCV1
Table 23 Subaddress 6D
1996 Jul 03
DATA BYTE
DATA BYTE
Digital Video Encoders (DENC2-M6)
SRCV11
ORCV2
ORCV1
PRCV2
PRCV1
TRCV2
SRCV1
SRCM
CCEN
CBLF
0
0
1
1
DATA BYTE
enables individual line 21 encoding; see Table 24
defines signal type on pin RCM1; see Table 25
LOGIC LEVEL
SRCV10
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
polarity of RCV2 as output is active HIGH, rising edge is taken when input,
respectively. Default after reset
polarity of RCV2 as output is active LOW, falling edge is taken when input,
respectively
pin RCV2 is switched to input. Default after reset
pin RCV2 is switched to output
if ORCV2 = HIGH, pin RCV2 provides an HREF signal (Horizontal Reference Pulse
that is defined by RCV2S and RCV2E, also during vertical blanking Interval). Default
after reset
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization only
(if TRCV2 = 1). Default after reset
if ORCV2 = HIGH, pin RCV2 provides a ‘composite blanking not’ signal i.e. a
reference pulse that is defined by RCV2S and RCV2E, excluding vertical blanking
Interval, which is defined by FAL and LAL (PRCV2 must be LOW)
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization
(if TRCV2 = 1) and as an internal blanking signal
polarity of RCV1 as output is active HIGH, rising edge is taken when input,
respectively. Default after reset
polarity of RCV1 as output is active LOW, falling edge is taken when input,
respectively
pin RCV1 is switched to input. Default after reset
pin RCV1 is switched to output
horizontal synchronization is taken from RCV1 port. Default after reset
horizontal synchronization is taken from RCV2 port
defines signal type on pin RCV1; see Table 22
not applicable
AS OUTPUT
FSEQ
VS
FS
not applicable
AS INPUT
FSEQ
VS
FS
19
DESCRIPTION
vertical sync each field. Default after reset
frame sync (odd/even)
field sequence, vertical sync every fourth field
(PAL = 0) or eighth field (PAL = 1)
DESCRIPTION
SAA7184; SAA7185B
FUNCTION
Preliminary specification

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