SAA7184 Philips Semiconductors, SAA7184 Datasheet - Page 28

• Manufacturer Part Number: SAA7184
• Description: Digital Video Encoders DENC2-M6
• Manufacturer: Philips Semiconductors

Philips Semiconductors
1996 Jul 03
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handbook, full pagewidth
Digital Video Encoders (DENC2-M6)
The data demultiplexing phase is coupled to the internal horizontal phase.
The CREF signal applies only for the 16 lines digital TV format, because these signals are only valid in 13.5 MHz.
The phase of the RCV2 signal is programmed to tbf (tbf for 50 Hz) in this example in output mode (BRCV2).
(1) Sequence bit:
(2) Reserved bits: 235 with 50 Hz systems; 232 with 60 Hz systems.
(3) Only from SAA7111 decoder.
(4) SAA7111 provides (22:0) bits, resulting in 3 reserved bits before sequence bit.
RTCI
PAL = logic 0 then (R
NTSC = logic 0 then no change.
LLC
CREF
VP(n)
DP(n)
RCV2
H/L transition
count start
128
Y) line normal; PAL = logic 1 then (R
not used in DENC2
13
Cb(0)
Y(0)
increment
HPLL
0
reserved
4 bits
Fig.8 Digital TV timing.
Cr(0)
Y(1)
21
Fig.9 RTCI timing.
Y) line inverted.
28
sample
valid
Cb(2)
Y(2)
sample
invalid
Cr(2)
Y(3)
SAA7184; SAA7185B
reserved
8/LLC
5 bits
0
Preliminary specification
sequence
bit (1)
MBE743
Cb(4)
Y(4)
MBE739
reserved (2)