MC68HC11E Motorola, MC68HC11E Datasheet - Page 40
MC68HC11E
Manufacturer Part Number
MC68HC11E
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC68HC11E.pdf
(268 pages)
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Operating Modes and On-Chip Memory
Data Sheet
40
$101A
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$1019
Addr.
Timer Output Compare 1 Register
Timer Output Compare 1 Register
Timer Output Compare 2 Register
Timer Output Compare 2 Register
Timer Output Compare 3 Register
Timer Output Compare 3 Register
Timer Output Compare 4 Register
Timer Output Compare 4 Register
TImer Input Capture 2 Register
Timer Input Capture 2 Register
Timer Input Capture 3 Register
Timer Input Capture 3 Register
Register Name
Figure 2-7. Register and Control Bit Assignments (Sheet 3 of 6)
See page 147.
See page 147.
See page 147.
See page 147.
See page 149.
See page 149.
See page 150.
See page 150.
See page 150.
See page 150.
See page 150.
See page 150.
High (TOC1H)
High (TOC2H)
High (TOC3H)
High (TOC4H)
Low (TOC1L)
Low (TOC2L)
Low (TOC3L)
Low (TOC4L)
High (TIC2H)
High (TIC3H)
Low (TIC2L)
Low (TIC3L)
Freescale Semiconductor, Inc.
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Operating Modes and On-Chip Memory
I = Indeterminate after reset
Bit 15
Bit 15
Bit 15
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
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1
1
1
1
1
1
1
1
= Unimplemented
Bit 14
Bit 14
Bit 14
Bit 14
Bit 14
Bit 14
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
1
1
1
1
1
1
1
1
6
Bit 13
Bit 13
Bit 13
Bit 13
Bit 13
Bit 13
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
1
1
1
1
1
1
5
1
1
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Bit 12
Bit 12
Bit 12
Bit 12
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
R
1
1
1
1
1
1
1
1
4
= Reserved
Bit 11
Bit 11
Bit 11
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
1
1
1
1
1
1
1
1
3
M68HC11E Family — Rev. 5
Bit 10
Bit 10
Bit 10
Bit 10
Bit 10
Bit 10
U = Unaffected
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
1
1
1
1
1
1
1
1
2
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
1
1
1
1
1
1
1
1
1
MOTOROLA
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 0
1
1
1
1
1
1
1
1