MC68HC11K Motorola, MC68HC11K Datasheet - Page 39

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MC68HC11K

Manufacturer Part Number
MC68HC11K
Description
8-Bit Microcontroller
Manufacturer
Motorola
Datasheet

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OPTION —System Configuration Options
ADPU —A/D Converter Power up
CSEL —Clock Select
IRQE —IRQ Select Edge Sensitive Only
DLY —Enable Oscillator Start-Up Delay on Exit from STOP
M68HC11 K Series
MC68HC11KTS/D
RESET:
FFC0, C1 —FFD4, D5
*Same level as an instruction
*Can be written only once in first 64 cycles out of reset in normal modes, or at any time in special modes.
Refer to 9 Analog-to-Digital Converter.
Refer to 9 Analog-to-Digital Converter.
Vector Address
FFDC, DD
FFDA, DB
FFDE, DF
FFEC, ED
FFD6, D7
FFD8, D9
FFEA, EB
FFEE, EF
FFFA, FB
FFFC, FD
FFE0, E1
FFE2, E3
FFE4, E5
FFE6, E7
FFE8, E9
FFFE, FF
FFF0, F1
FFF2, F3
FFF4, F5
FFF6, F7
FFF8, F9
0 = Low level recognition
1 = Falling edge recognition
0 = No stabilization delay on exit from STOP
1 = Stabilization delay enabled on exit from STOP
ADPU
Bit 7
0
CSEL
Reserved
SCI Serial System
SPI Serial Transfer Complete
Pulse Accumulator Input Edge
Pulse Accumulator Overflow
Timer Overflow
Timer Input Capture 4/Output Compare 5
Timer Output Compare 4
Timer Output Compare 3
Timer Output Compare 2
Timer Output Compare 1
Timer Input Capture 3
Timer Input Capture 2
Timer Input Capture 1
Real Time Interrupt
IRQ
XIRQ Pin
Software Interrupt
Illegal Opcode Trap
COP Failure
Clock Monitor Fail
RESET
6
0
SCI Receive Data Register Full
SCI Receiver Overrun
SCI Transmit Data Register Empty
SCI Transmit Complete
SCI Idle Line Detect
IRQE*
5
0
Interrupt Source
DLY*
4
1
CME
3
0
FCME*
CCR Mask
2
0
None
None
None
None
None
Bit
X
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
CR1*
1
0
Local Mask
NOCOP
PAOVI
I4/O5I
OC4I
OC3I
OC2I
OC1I
None
None
None
None
None
TCIE
SPIE
CME
ILIE
PAII
IC3I
IC2I
IC1I
RTII
RIE
RIE
TOI
TIE
$0039
CR0*
Bit 0
0
MOTOROLA
(1 = High)
Priority
19
20
21
22
23
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
*
*
39

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