UPD703003AGC-25 NEC, UPD703003AGC-25 Datasheet
UPD703003AGC-25
Related parts for UPD703003AGC-25
UPD703003AGC-25 Summary of contents
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... Communications equipment: Mobile telephones, etc. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. U13188EJ4V0DS00 (4th edition) ...
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... P55/AD13 16 P54/AD12 17 P53/AD11 18 P52/AD10 19 P51/AD9 20 P50/AD8 21 P47/AD7 22 P46/AD6 23 P45/AD5 24 P44/AD4 25 Caution Connect the IC (Internally Connected) pin directly PD703003A, 703004A, 703025A Package Frequency (MHz) (Bytes) 14 mm) 14 mm) 14 mm) 14 mm) 14 mm) 14 mm) 14 mm) PD703004AGC-33-xxx-8EU PD703025AGC-25-xxx-8EU PD703025AGC-33-xxx-8EU ...
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... CKSEL: Clock Select CLKOUT: Clock Output DSTB: Data Strobe HLDAK: Hold Acknowledge HLDRQ: Hold Request IC: Internally Connected INTP110 to INTP113,: Interrupt Request from Peripherals INTP120 to INTP123, INTP130 to INTP133, INTP140 to INTP143 LBEN: Lower Byte Enable MODE: Mode NMI: Non-maskable Interrupt Request P00 to P07: ...
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INTERNAL BLOCK DIAGRAM NMI INTC INTP110 to INTP113 INTP120 to INTP123 INTP130 to INTP133 INTP140 to INTP143 TO110, TO111 TO120, TO121 RPU TO130, TO131 TO140, TO141 TCLR11 to TCLR14 TI11 to TI14 SIO SO0/TXD0 SI0/RXD0 UART0/CSI0 SCK0 BRG0 SO1/TXD1 SI1/RXD1 ...
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... DIFFERENCES AMONG PRODUCTS ............................................................................................ 2. PIN FUNCTIONS .............................................................................................................................. 2.1 Port Pins ................................................................................................................................ 2.2 Non-Port Pins ........................................................................................................................ 2.3 Pin I/O Circuits and Recommended Connection of Unused Pins .................................... 11 3. ELECTRICAL SPECIFICATIONS .................................................................................................... 14 4. PACKAGE DRAWING ..................................................................................................................... 36 5. RECOMMENDED SOLDERING CONDITIONS ............................................................................... 37 PD703003A, 703004A, 703025A CONTENTS Data Sheet U13188EJ4V0DS00 ...
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DIFFERENCES AMONG PRODUCTS Item PD703003 PD703003A PD703004A PD703025A PD70F3003 Internal ROM Mask ROM 128 KB Internal RAM 4 KB Operation Normal Single-chip Implemented mode operation mode mode ROM-less Implemented Not implemented mode Flash memory Not implemented programming mode V ...
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PIN FUNCTIONS 2.1 Port Pins Pin Name I/O P00 I/O Port 0 8-bit I/O port P01 Input/output can be specified in 1-bit units. P02 P03 P04 P05 P06 P07 P10 I/O Port 1 8-bit I/O port P11 Input/output can ...
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Pin Name I/O P60 to P63 I/O Port 6 4-bit I/O port Input/output can be specified in 1-bit units. P70 to P77 Input Port 7 8-bit input port P90 I/O Port 9 7-bit I/O port P91 Input/output can be specified ...
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Non-Port Pins Pin Name I/O TO110 Output Pulse signal output from timers TO111 TO120 TO121 TO130 TO131 TO140 TO141 TCLR11 Input External clear signal input for timers TCLR12 TCLR13 TCLR14 TI11 Input External ...
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... Control signal input for inserting wait in bus cycle MODE Input Operation mode specification RESET Input System reset input X1 Input Resonator connection for system clock. Input is via X1 when using an external clock. X2 — ADTRG Input A/D converter external trigger input AV Input Reference voltage input for A/D converter ...
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... Pin I/O Circuits and Recommended Connection of Unused Pins The input/output circuit type of each pin and recommended connection of unused pins are shown in Table 2-1. Figure 2-1 illustrates the various circuit types using partially abridged diagrams. When connecting via a resistor, a resistance value in the range ...
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... Pin Name Input/Output Circuit Type CLKOUT WAIT MODE RESET CV /CKSEL REF1 REF3 PD703003A, 703004A, 703025A Recommended Connection of Unused Pins 3 Leave open. 1 Connect directly — Connect directly — Connect directly — Connect directly Data Sheet U13188EJ4V0DS00 — ...
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Figure 2-1. Pin Input/Output Circuits Type P-ch IN N-ch Type 2 IN Schmitt-triggered input with hysteresis characteristics Type P-ch OUT N-ch Type Data P-ch Output N-ch disable Input enable PD703003A, 703004A, ...
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... T A Storage temperature T stg Note X1, P70/ANI0 to P77/ANI7, and AV Cautions 1. Be sure to avoid direct connections among the IC device output (or I/O) pins and between and GND. However, open-drain pins and open collector pins can be directly DD CC connected. A direct connection to an external circuit can be made to avoid conflicting output from high-impedance pins if the external circuit is designed for the correct timing ...
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... Operating Conditions Operation Mode Direct mode, PLL mode Notes 1. When not using A/D converter 2. When using A/D converter Recommended Oscillator (1) Ceramic resonator connection (T (a) PD703003A, 703004A Manufacturer Part Number Oscillation Frequency f XX Kyocera KBR-5.0MSA/MSB Corporation KBR-5.0MKC KBR-5.0MKD KBR-5.0MKS PBRC5.00A PBRC5 ...
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PD703025A Manufacturer Part Number Oscillation Frequency f XX TDK CCR4.0MC3 CCR5.0MC3 Murata Mfg. CSA4.00MG040 Co., Ltd. CST4.00MGW040 CSTS0400MG06 CSA6.60MTZ040 CST6.60MTW040 CSTS0660MG06 Cautions 1. Put the oscillator as close to the X1 and X2 pins as possible not ...
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DC Characteristics (T = – Parameter Symbol Input voltage, high V IH Input voltage, low V IL Clock input voltage, high V XH Clock input voltage, low Schmitt-triggered input V T Threshold ...
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DC Characteristics (T = – Parameter Symbol Power PD703003A, When I DD1 supply 703004A operating current In I DD2 HALT mode In I DD3 IDLE mode In I DD4 STOP mode PD703025A When I DD1 ...
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Data Retention Characteristics (T = – Parameter Symbol Data retention voltage V DDDR Data retention current I DDDR Power supply voltage rise time t RVD Power supply voltage fall time t FVD Power supply voltage hold ...
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AC Characteristics (T = – test input waveform (a) P02/TCLR11, P03/TI11, P04/INTP110 to P07/INTP113, P12/TCLR12, P13/TI12, P14/INTP120, P15/INTP121/ SO2, P16/INTP122/SI2, P17/INTP123/SCK2, P23/RXD0/SI0, P24/SCK0, P26/RXD1/SI1, P27/SCK1, P32/ TCLR32, P33/TI13, P34/INTP130, P35/INTP131/SO3, P36/INTP132/SI3, P37/INTP133/SCK3, P112/TCLR14, P113/TI14, ...
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Clock timing Parameter Symbol X1 input cycle <1> t CYX X1 input high-level width <2> t WXH X1 input low-level width <3> t WXL X1 input rise time <4> input fall time <5> CPU ...
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Input waveform (a) P02/TCLR11, P03/TI11, P04/INTP110 to P07/INTP113, P12/TCLR12, P13/TI12, P14/INTP120, P15/ INTP121/SO2, P16/INTP122/SI2, P17/INTP123/SCK2, P23/RXD0/SI0, P24/SCK0, P26/RXD1/SI1, P27/ SCK1, P32/TCLR32, P33/TI13, P34/INTP130, P35/INTP131/SO3, P36/INTP132/SI3, P37/INTP133/ SCK3, P112/TCLR14, P113/TI14, P114/INTP140 to P117/INTP143, RESET, NMI, MODE Parameter Symbol Input rise ...
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Reset timing Parameter Symbol RESET high-level width <18> t WRSH RESET low-level width <19> t WRSL Remark T : Oscillation stabilization time OST RESET (input) PD703003A, 703004A, 703025A Conditions 25 MHz Version MIN. MAX. 500 When power supply is ...
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Read timing (1/2) Parameter Symbol Delay time from CLKOUT to address <20> t DKA Delay time from CLKOUT to R/W, UBEN, LBEN <78> t DKA2 Delay time from CLKOUT to address float <21> t FKA Delay time from CLKOUT ...
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Read timing (2/2): 1 wait T1 CLKOUT (output) <20> A16 to A19 (output) <78> R/W (output) UBEN (output) LBEN (output) AD0 to AD15 (I/ A15 (output) <22> <29> ASTB (output) <40> DSTB (output) WAIT (input) <41> Remark ...
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Write timing (1/2) Parameter Symbol Delay time from CLKOUT to address <20> t DKA Delay time from CLKOUT to R/W, UBEN, LBEN <78> t DKA2 Delay time from CLKOUT to ASTB <22> t DKST Delay time from CLKOUT to ...
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Write timing (2/2): 1 wait T1 CLKOUT (output) <20> A16 to A19 (output) <78> R/W (output) UBEN (output) LBEN (output) AD0 to AD15 (I/ A15 (output) <22> <29> ASTB (output) <40> DSTB (output) WAIT (input) <41> Remark ...
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Bus hold timing (1/2) Parameter Symbol HLDRQ setup time (to CLKOUT ) <54> t SHQK HLDRQ hold time (from CLKOUT ) <55> t HKHQ HLDAK delay time from CLKOUT <56> t DKHA HLDRQ high-level width <57> t WHQH HLDAK ...
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Bus hold timing (2/2) CLKOUT (output) <54> <55> HLDRQ (input) <61> HLDAK (output) A16 to A19 (output), Note D0 to D15 AD0 to AD15 (I/O) (input or output) ASTB (output) DSTB (output) R/W (output) Note UBEN (output), LBEN (output) ...
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Interrupt timing Parameter Symbol NMI high-level width <63> t WNIH NMI low-level width <64> t WNIL INTPn high-level width <65> t WITH INTPn low-level width <66> t WITL Remark CYK NMI (input) INTPn (input) Remark n ...
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CSI timing (1/2) (a) Master mode (i) Timing of CSI0 to CSI2 Parameter Symbol SCKn cycle <67> t CYSK1 SCKn high-level width <68> t WSKH1 SCKn low-level width <69> t WSKL1 SIn setup time (to SCKn ) <70> t ...
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CSI timing (2/2) (ii) Timing of CSI3 Parameter Symbol SCK3 cycle <67> t CYSK4 SCK3 high-level width <68> t WSKH4 SCK3 low-level width <69> t WSKL4 SI3 setup time (to SCK3 ) <70> t SSISK4 SI3 hold time (from ...
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RPU timing Parameter Symbol TI1n high-level width <74> t WTIH TI1n low-level width <75> t WTIL TCLR1n high-level width <76> t WTCH TCLR1n low-level width <77> t WTCL Remark CYK TI1n (input) TCLR1n (input) Remark n ...
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A/D Converter Characteristics (T = – Parameter Symbol Resolution — Note 1 Overall error — 4 — 3 Quantization error — Conversion time t 4 CONV 3 ...
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D/A Converter Characteristics (T = – Parameter Symbol Conditions Resolution — Overall error — Load condition REF2 REF3 — Load condition ...
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PACKAGE DRAWING 100-PIN PLASTIC LQFP (FINE PITCH) (14x14 100 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. 36 PD703003A, 703004A, 703025A A ...
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... For the details of the recommended soldering conditions, refer to the document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than those recommended below, contact your NEC sales represen- tatives. PD703003AGC-25-xxx-8EU: 100-pin plastic LQFP (fine pitch) (14 PD703003AGC-33-xxx-8EU: 100-pin plastic LQFP (fine pitch) (14 ...
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... HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction connection is provided to the input pins possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry ...
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... Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify: • Device availability • Ordering information • ...
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... The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited without governmental license, the need for which must be judged by the customer. The export or re-export of this product from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales representative. ...