MBM29F400BC-55 FUJITSU [Fujitsu Component Limited.], MBM29F400BC-55 Datasheet - Page 14

• Manufacturer Part Number: MBM29F400BC-55
• Description: 4M (512K X 8/256K X 16) BIT
• Manufacturer: FUJITSU [Fujitsu Component Limited.]

14
MBM29F400TC
Notes: 1. Address bits A
Command Definitions
Read/Reset Command
Read/Reset
Read/Reset
Autoselect
Program
Chip Erase
Sector
Erase
Sector Erase Suspend
Sector Erase Resume
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in the improper sequence will reset the device to the
read mode. Table 7 defines the valid register command sequences. Note that the Erase Suspend (B0H) and
Erase Resume (30H) commands are valid only while the Sector Erase operation is in progress. Moreover both
Read/Reset commands are functionally equivalent, resetting the device to the read mode. Please note that
commands are always written at DQ
The read or eset operation is initiated by writing the read/reset command sequence into the command register.
Microprocessor read cycles retrieve array data from the memory. The devices remain enabled for reads until the
command register contents are altered.
Command
Sequence
2. Bus operations are defined in Tables 2 and 3.
3. RA = Address of the memory location to be read.
4. RD = Data read from location RA during read operation.
5. The system should generate the following address patterns:
6. Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.
Sector Address (SA).
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of
SA = Address of the sector to be erased. The combination of A
PD = Data to be programmed at location PA. Data is latched on the falling edge of WE.
Word Mode: 555H or 2AAH to addresses A
Byte Mode: AAAH or 555H to addresses A
Word
Word
Word
Word
Word
Word
Byte
Byte
Byte
Byte
Byte
Byte
the WE pulse.
uniquely select any sector.
Cycles
Req'd
Write
Bus
1
3
3
4
6
6
15
to A
Erase can be suspended during sector erase with Addr (“H” or “L”). Data (B0H)
XXXH F0H
AAAH
AAAH
AAAH
AAAH
AAAH
Erase can be resumed after suspend with Addr (“H” or “L”). Data (30H)
Write Cycle
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
555H
555H
555H
555H
555H
Table 7
First Bus
11
-55/-70/-90
= X = “H” or “L” for all address commands except or Program Address (PA) and
AAH
AAH
AAH
AAH
AAH
MBM29F400TC/BC Command Definitions
0
to DQ
Write Cycle
2AAH
2AAH
2AAH
2AAH
2AAH
555H
555H
555H
555H
555H
—
Second
7
Bus
/MBM29F400BC
and DQ
55H
55H
55H
55H
55H
—
-1
0
8
AAAH
AAAH
AAAH
AAAH
AAAH
Write Cycle
to A
555H
555H
555H
555H
555H
to A
to DQ
Third Bus
—
10
10
15
A0H
F0H
90H
80H
80H
bits are ignored.
—
AAAH
AAAH
Fourth Bus
Read/Write
555H
555H
RA
PA
—
—
17
Cycle
, A
16
AAH
AAH
RD
PD
, A
—
—
15
-55/-70/-90
, A
Write Cycle
2AAH
2AAH
555H
555H
Fifth Bus
14
—
—
—
—
, A
13
, and A
55H
55H
—
—
—
—
AAAH
Write Cycle
12
555H
Sixth Bus
SA
—
—
—
—
will
10H
30H
—
—
—
—