AD7885 AD [Analog Devices], AD7885 Datasheet - Page 10

• Manufacturer Part Number: AD7885
• Description: LC2MOS 16-Bit, High Speed Sampling ADCs
• Manufacturer: AD [Analog Devices]

AD7884/AD7885
Decoupling and Grounding
The AD7884 and AD7885A have one AV
pins. They also have one AV
AD7885 has one AV
V
used for the positive supply pins and a common –5 V supply for
the negative supply pins.
For decoupling purposes, the critical pins on both devices are
the AV
system AGND with 10 F tantalum and 0.1 F ceramic capaci-
tors right at the pins. With the V
to decouple each of these with ceramic 1 F capacitors.
AGNDS, AGNDF are the ground return points for the on-chip
9-bit ADC. They should be driven by a buffer amplifier as
shown in Figure 6. If they are tied directly together and then
to ground, there will he a marginal degradation in linearity
performance.
The GND pin is the analog ground return for the on-chip linear
circuitry. It should he connected to system analog ground.
The DGND pin is the ground return for the on-chip digital
circuitry. It should be connected to the ground terminal of the
V
AV
mon ground point.
Power Supply Sequencing
AV
is typically 17
by separate +5 V supplies, then these should come up simulta-
neously. Otherwise, the one that comes up first will have to
drive +5 V into a 17
the standard short-circuit protection on regulators like the 7800
series will ensure that there is no possibility of damage to the
driving device.
AV
as V
used to ensure that V
Arranging the power supplies as in Figure 6 and using the recom-
mended decoupling ensures that there are no power supply
sequencing issues as well as giving the specified noise performance.
SS
DD
Figure 12. Schottky Diodes Used to Protect Against
Incorrect Power Supply Sequencing
DD
DD
SS
pin. Figure 6 shows how a common +5 V supply should be
SS
and V
should always come up either before or at the same time
. If this cannot be guaranteed, Schottky diodes should be
and V
and V
DD
and AV
SS
DD
DD
AV
+5V
supplies. If a common analog supply is used for
DD
then DGND should be connected to the com-
are connected to a common substrate and there
resistance between them. If they are powered
SS
AD7884/AD7885
+5V
V
pins. Each of these should be decoupled to
DD
DD
SS
load for a short period of time. However,
never exceeds AV
pin, one V
AV
–5V
SS
SS
pin and three V
DD
DD
–5V
V
and V
SS
pin, one AV
SS
SS
DD
EQUIVALENT
HP5082-2810
by more than 0.3 V.
pins, it is sufficient
pin and two V
SS
OR
pins. The
SS
pin and one
DD
–10–
AD7884/AD7885 PERFORMANCE
Linearity
The linearity of the AD7884/AD7885 is determined by the
on-chip 16-bit D/A converter. This is a segmented DAC which
is laser trimmed for 16-bit DNL performance to ensure that
there are no missing codes in the ADC transfer function. Figure
13 shows a typical INL plot for the AD7884/AD7885.
Noise
In an A/D converter, noise exhibits itself as code uncertainty in
dc applications and as the noise floor (in an FFT, for example)
in ac applications.
In a sampling A/D converter like the AD7884/AD7885, all in-
formation about the analog input appears in the baseband from
dc to 1/2 the sampling frequency. An antialiasing filter will re-
move unwanted signals above f
converter wideband noise will alias into the baseband. In the
AD7884/AD7885, this noise is made up of sample-and-hold
noise and A/D converter noise. The sample-and-hold section
contributes 51 V rms and the ADC section contributes 59 V
rms. These add up to a total rms noise of 78 V. This is the in-
put referred noise in the 3 V analog input range. When operat-
ing in the 5 V input range, the input gain is reduced to –0.6.
This means that the input referred noise is now increased by a
factor of 1.66 to 120 V rms.
Figure 14 shows a histogram plot for 5000 conversions of a dc
input using the AD7884/AD7885 in the 5 V input range. The
analog input was set as close as possible to the center of a code
transition. All codes other than the center code are due to the
ADC noise. In this case, the spread is six codes.
Figure 13. AD7884/AD7885 Typical Linearity Performance
Figure 14. Histogram of 5000 Conversions of a DC Input
2.0
1.5
1.0
0.5
0
0
3000
2000
1000
0
(X – 2) (X – 1)
16384
OUTPUT CODE
S
(X)
CODE
/2 in the input signal but the
32768
(X + 1) (X + 2) (X + 3)
49152
V
V
T = +25 C
SS
A
DD
= +5V
= –5V
REV. C
65535