CY7C132 CYPRESS [Cypress Semiconductor], CY7C132 Datasheet - Page 8

• Manufacturer Part Number: CY7C132
• Description: 2Kx8 Dual-Port Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Waveforms
Write Cycle No.1 (OE Three-States Data I/Os-Either Port)
Write Cycle No. 2 (R/W Three–States Data I/Os-Either Port)
Notes:
23. If OE is LOW during a R/W controlled write cycle, the write pulse width must be the larger of t
24. If the CE LOW transition occurs simultaneously with or after the R/W LOW transition, the outputs remain in a high-impedance state.
ADDRESS
ADDRESS
DATA
DATA
to be placed on the bus for the required t
D
D
R/W
OUT
R/W
OUT
OE
CE
CE
IN
IN
t
HZOE
(continued)
t
SA
SD
t
SA
.
t
SCE
t
SCE
t
AW
t
AW
t
HZWE
t
WC
t
WC
[15, 23]
8
[15, 24]
t
HIGH IMPEDANCE
PWE
PWE
t
PWE
DATA VALID
t
or t
SD
HZWE
HIGH IMPEDANCE
t
+ t
SD
SD
DATA VALID
to allow the data I/O pins to enter high impedance and for data
t
HD
t
HD
t
LZWE
t
t
HA
CY7C132/CY7C136
CY7C142/CY7C146
HA
C132-11
C132-10