AD9500TE AD [Analog Devices], AD9500TE Datasheet - Page 9

• Manufacturer Part Number: AD9500TE
• Description: Digitally Programmable Delay Generator
• Manufacturer: AD [Analog Devices]

MEASURING UNKNOWN DELAYS
Two AD9500s can be combined to measure delays with a high
degree of precision. One AD9500 is set with little or no pro-
grammed delay, and its output is used to drive the unknown
delay circuit, which in turn drives the input of a “D” type flip-
flop. The second AD9500 is triggered along with the first, and
its output provides a clocking signal for the flip-flop. The pro-
grammed delay of the second AD9500 is then varied to detect
the output edge from the unknown delay circuit.
Detecting the output edge is relatively straightforward. If the
programmed delay through the second AD9500 is too long, the
flip-flop output will be at logic HIGH. If, on the other hand, the
programmed delay through the second AD9500 is too short, the
flip-flop output will be at logic LOW. When the programmed
delay is properly adjusted, the flip-flop will likely bounce be-
tween logic HIGH and logic LOW. The digital code value used
to create the second programmed delay is a direct indication of
the delay through the unknown circuit. The most accurate re-
sults can only be attained by calibrating the system without the
unknown delay circuit in place.
MEASURING HIGH SPEED AC WAVEFORMS
The same circuitry used to measure unknown delays can be
extended to measure the time response of high speed ac wave-
forms. With the addition of a digital-to-analog converter and an
analog comparator, the circuit functions very much like the
previous application. The DAC sets a threshold level which
drives one of the differential comparator inputs. The other com-
parator input is driven by the device under test (DUT). The
output of the first AD9500 causes the DUT to produce an
output. The second AD9500, which is also triggered along with
the first AD9500, strobes the comparator latch enable.
If the DUT output is greater than the DAC threshold when the
comparator is latched, the comparator output will be at logic
HIGH. If the output is below the DAC threshold, the compara-
tor will be at logic LOW. The programmed delay setting of the
second AD9500 is adjusted to the point where the DUT output
REV. D
Figure 8. Measuring Unknown Delays
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equals the DAC threshold. By varying the DAC threshold level
and adjusting the second AD9500 programmed delay, a point
by point reconstruction of the ac waveform can be created.
PROGRAMMABLE OSCILLATOR
Another interesting use of the AD9500 is in a digitally program-
mable oscillator. The highly accurate delays generated by the
AD9500 can be exploited to create a ring oscillator with variable
duty cycle. The delayed output of the first AD9500 is used to
drive the TRIGGER input of the second AD9500. The output
of the second AD9500, in turn, is used to drive the TRIGGER
input of the first AD9500. Together the two devices will alter-
nately trigger each other creating two pulse chains on the outputs.
The total delay through both AD9500s combined, determines
the period of the oscillation frequency. The duty cycle can be
controlled by using the outputs to drive the SET and RESET
inputs of a flip-flop. The total delay through the first AD9500
will control the flip-flop logic LOW output pulsewidth, and the
second AD9500 will control the flip-flop logic HIGH output
pulsewidth.
Figure 9. Measuring AC Waveforms
Figure 10. Ring Oscillator
AD9500