AD9511BCPZ-REEL AD [Analog Devices], AD9511BCPZ-REEL Datasheet - Page 43

• Manufacturer Part Number: AD9511BCPZ-REEL
• Description: 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs
• Manufacturer: AD [Analog Devices]

Table 21. Serial Control Port, 16-Bit Instruction Word, MSB First
MSB
I15
R/ W
SCLK
SCLK
SCLK
SDIO
SDIO
SDIO
SDO
CSB
CSB
CSB
SCLK
SDIO
CSB
DON'T CARE
DON'T CARE
DON'T CARE
DON'T CARE
DON'T CARE
I14
W1
DON'T CARE
DON'T CARE
DON'T CARE
R/W
W1
R/W
A0 A1 A2 A3
I13
W0
W0
W1
16-BIT INSTRUCTION HEADER
A12
A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
W0
t
I12
A12 = 0
S
A12
R/W
A11 A10 A9 A8 A7
A4
t
DS
16-BIT INSTRUCTION HEADER
16-BIT INSTRUCTION HEADER
W1
A5 A6 A7 A8 A9 A10 A11 A12
Figure 48. Serial Control Port Write—MSB First, 16-Bit Instruction, Timing Measurements
SCLK
SDIO
SDO
CSB
Figure 47. Serial Control Port Read—MSB First, 16-Bit Instruction, 4 Bytes od Data
Figure 46. Serial Control Port Write—MSB First, 16-Bit Instruction, 2 Bytes of Data
I11
A11 = 0
Figure 50. Serial Control Port Write—LSB First, 16-Bit Instruction, 2 Bytes Data
W0
t
DH
Figure 49. Timing Diagram for Serial Control Port Register Read
A12
A6 A5
I10
A10 = 0
A11
t
HI
DATA BIT N
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
A4 A3 A2
REGISTER (N) DATA
A10
t
t
LO
DV
W0
Rev. A | Page 43 of 60
I9
A9 = 0
A9
t
A1 A0
W1
CLK
R/W
A8
D0
D7 D6 D5 D4 D3
DATA BIT N– 1
I8
A8 = 0
REGISTER (N – 1) DATA
A7
D1
REGISTER (N) DATA
REGISTER (N) DATA
D2 D3 D4
A6
I7
A7 = 0
A5
D2 D1 D0 D7
D5 D6 D7 D0
D4
REGISTER (N – 2) DATA
I6
A6
D3
I5
A5
D6 D5
REGISTER (N – 1) DATA
D1 D2
REGISTER (N + 1) DATA
D2
I4
A4
D4 D3 D2
D1
D3 D4 D5
REGISTER (N – 3) DATA
I3
A3
D0
t
H
D1 D0
D6
I2
A2
D7
DON'T CARE
DON'T CARE
DON'T CARE
DON'T CARE
I1
A1
DON'T CARE
DON'T CARE
AD9511
DON'T CARE
DON'T
CARE
LSB
I0
A0