CAT25080 CATALYST [Catalyst Semiconductor], CAT25080 Datasheet - Page 9

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CAT25080

Manufacturer Part Number
CAT25080
Description
8-Kb and 16-Kb SPI Serial CMOS EEPROM
Manufacturer
CATALYST [Catalyst Semiconductor]
Datasheet

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READ OPERATIONS
Read from Memory Array
To read from memory, the host sends a READ
instruction followed by a 16-bit address (see Table 5 for
the number of significant address bits).
After receiving the last address bit, the CAT25080/160
will respond by shifting out data on the SO pin (as
shown in Figure 8). Sequentially stored data can be
read out by simply continuing to run the clock. The
internal address pointer is automatically incremented to
the next higher address as data is shifted out. After
reaching the highest memory address, the address
counter “rolls over” to the lowest memory address, and
the read cycle can be continued indefinitely. The read
operation is terminated by taking CS
Figure 8. READ Timing
Note: Dashed Line = mode (1, 1) - - - - - -
Figure 9. RDSR Timing
Note: Dashed Line = mode (1, 1) - - - - - -
© 2006 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
SCK
SCK
CS
SO
SO
CS
SI
SI
* Please check the Byte Address Table (Table 5).
0
0
0
0
0
1
0
0
2
1
0
HIGH IMPEDANCE
3
OPCODE
0
OPCODE
2
0
4
¯¯ high.
0
0
HIGH IMPEDANCE
5
3
1
6
0
4
1
7
A N
1
8
5
9
BYTE ADDRESS*
6
0
10
9
1
7
20
Read Status Register
To read the status register, the host simply sends a
RDSR command. After receiving the last bit of the
command, the CAT25080/160 will shift out the contents
of the status register on the SO pin (Figure 9). The
status register may be read at any time, including during
an internal write cycle.
MSB
21
8
7
22
9
6
23
A 0
24
10
MSB
5
7
25
6
11
4
26
DATA OUT
5
27
12
DATA OUT
3
4
CAT25080, CAT25160
28
3
13
2
29
2
30
14
1
1
0
0
Doc. No. 1122 Rev. A

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