CY7C1518AV18 CYPRESS [Cypress Semiconductor], CY7C1518AV18 Datasheet - Page 21

• Manufacturer Part Number: CY7C1518AV18
• Description: 72-Mbit DDR-II SRAM Two-Word Burst Architecture
• Manufacturer: CYPRESS [Cypress Semiconductor]

Capacitance
Tested initially and after any design or process change that may affect these parameters.
Thermal Resistance
Tested initially and after any design or process change that may affect these parameters.
Note
Document Number: 001-06982 Rev. *I
C
C
C
25. Unless otherwise noted, test conditions assume signal transition time of 2 V/ns, timing reference levels of 0.75 V, V
Parameter
Parameter
IN
CLK
O
levels of 0.25 V to 1.25 V, and output loading of the specified I


JA
JC
OUTPUT
Device
Under
Test
V
REF
ZQ
Input capacitance
Clock input capacitance
Output capacitance
Thermal resistance
(junction to ambient)
Thermal resistance
(junction to case)
(a)
Z
RQ =
250 
0.75 V
0
= 50 
Description
Description
V
REF
R
L
= 0.75 V
= 50 
Figure 4. AC Test Loads and Waveforms
INCLUDING
Device
Under
Test
T
Test conditions follow standard test methods and
procedures for measuring thermal impedance, in
accordance with EIA / JESD51.
OUTPUT
A
JIG AND
SCOPE
= 25 °C, f = 1 MHz, V
OL
V
REF
/ I
ZQ
OH
and load capacitance shown in (a) of
0.75 V
RQ =
250 
(b)
V
REF
Test Conditions
Test Conditions
= 0.75 V
DD
R = 50 
5 pF
= 1.8 V, V
0.25 V
DDQ
Figure
= 1.5 V
REF
1.25 V
4.
= 0.75 V, RQ = 250 , V
Slew Rate = 2 V/ns
ALL INPUT PULSES
0.75 V
CY7C1518AV18
CY7C1520AV18
165-ball FBGA
Package
DDQ
Max
16.3
5.5
8.5
2.1
6
= 1.5 V, input pulse
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Page 21 of 29
°C/W
°C/W
Unit
Unit
pF
pF
pF
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