MK20DN512ZVMB10 FREESCALE [Freescale Semiconductor, Inc], MK20DN512ZVMB10 Datasheet - Page 20

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MK20DN512ZVMB10

Manufacturer Part Number
MK20DN512ZVMB10
Description
K20 Sub-Family Data Sheet
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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General
5.3.2 General switching specifications
These general purpose specifications apply to all signals configured for GPIO, UART,
CAN, CMT, and I
1. The greater synchronous and asynchronous timing must be met.
2. This is the shortest pulse that is guaranteed to be recognized.
3. 75pF load
4. 15pF load
5.4 Thermal specifications
20
Symbol
GPIO pin interrupt pulse width (digital glitch filter
disabled) — Synchronous path
GPIO pin interrupt pulse width (digital glitch filter
disabled, analog filter enabled) — Asynchronous path
GPIO pin interrupt pulse width (digital glitch filter
disabled, analog filter disabled) — Asynchronous path
External reset pulse width (digital glitch filter disabled)
Mode select (EZP_CS) hold time after reset
deassertion
Port rise and fall time (high drive strength)
Port rise and fall time (low drive strength)
Description
• Slew disabled
• Slew enabled
• Slew disabled
• Slew enabled
• 1.71 ≤ V
• 2.7 ≤ V
• 1.71 ≤ V
• 2.7 ≤ V
• 1.71 ≤ V
• 2.7 ≤ V
• 1.71 ≤ V
• 2.7 ≤ V
2
C signals.
K20 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011.
Table 10. General switching specifications
DD
DD
DD
DD
DD
DD
DD
DD
≤ 3.6V
≤ 3.6V
≤ 3.6V
≤ 3.6V
≤ 2.7V
≤ 2.7V
≤ 2.7V
≤ 2.7V
Min.
100
100
1.5
16
2
Max.
12
36
24
12
36
24
6
6
Freescale Semiconductor, Inc.
Bus clock
Bus clock
cycles
cycles
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1
2
2
2
3
4

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