CY7C66113C-XC CYPRESS [Cypress Semiconductor], CY7C66113C-XC Datasheet - Page 59

• Manufacturer Part Number: CY7C66113C-XC
• Description: Full-Speed USB (12 Mbps) Peripheral Controller with Integrated Hub
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-08024 Rev. *B
27.0
28.0
Electrical contact of the part to the Printed Circuit Board (PCB) is made by soldering the leads on the bottom surface of the
package to the PCB. Hence, special attention is required to the heat transfer area below the package to provide a good thermal
bond to the circuit board. A Copper (Cu) fill is to be designed into the PCB as a thermal pad under the package. Heat is transferred
from the FX1 through the device’s metal paddle on the bottom side of the package. Heat from here, is conducted to the PCB at
the thermal pad. It is then conducted from the thermal pad to the PCB inner ground plane by a 5 x 5 array of via. A via is a plated
through hole in the PCB with a finished diameter of 13 mil. The QFN’s metal die paddle must be soldered to the PCB’s thermal
pad. Solder mask is placed on the board top side over each via to resist solder flow into the via. The mask on the top side also
minimizes outgassing during the solder reflow process.
For further information on this package design please refer to the application note Surface Mount Assembly of AMKOR’s
MicroLeadFrame (MLF) Technology. This application note can be downloaded from AMKOR’s website from the following URL
http://www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf. The application note provides detailed information on
board mounting guidelines, soldering flow, rework process, etc.
Figure 28-1 below displays a cross-sectional area underneath the package. The cross section is of only one via. The thickness
of the solder paste template should be 5 mil. It is recommended that “No Clean” type 3 solder paste is used for mounting the part.
Nitrogen purge is recommended during reflow.
Figure 28-2 is a plot of the solder mask pattern. This pad is thermally connected and is not electrically connected inside the chip.
To minimize EMI, this pad should be connected to the ground plane of the circuit board.
Board Pad 4.7mm x 5.2 mm minimum
6.63mm x 6.63mm maximum
Package Diagrams
Quad Flat Package No Leads (QFN) Package Design Notes
0.80[0.031]
DIA.
A
1
2
N
7.90[0.311]
8.10[0.319]
TOP VIEW
7.70[0.303]
7.80[0.307]
(continued)
56-Lead QFN 8 x 8 MM LF56A
0.80[0.031] MAX.
1.00[0.039] MAX.
SIDE VIEW
0°-12°
C
0.05[0.002] MAX.
0.20[0.008] REF.
0.08[0.003]
SEATING
PLANE
0.30[0.012]
0.50[0.020]
C
6.45[0.254]
6.55[0.258]
(PAD SIZE VARY
BY DEVICE TYPE)
BOTTOM VIEW
E-PAD
0.18[0.007]
0.28[0.011]
0.50[0.020]
N
1
2
CY7C66013C
CY7C66113C
PIN1 ID
0.20[0.008] R.
0.24[0.009]
0.60[0.024]
0.45[0.018]
(4X)
Page 59 of 61
51-85144-*D
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