CY7C68000 CYPRESS [Cypress Semiconductor], CY7C68000 Datasheet - Page 10

• Manufacturer Part Number: CY7C68000
• Description: TX2 USB 2.0 UTMI Transceiver
• Manufacturer: CYPRESS [Cypress Semiconductor]

9.2.2
Table 9-2. 30 MHz Timing Interface Timing Constraints Parameters
Document #: 38-08016 Rev. *E
T
T
T
T
T
T
T
T
T
CSU_MIN
CH_MIN
DSU_MIN
DH_MIN
CCO
CDO
VSU_MIN
VH_MIN
CVO
Parameter
HS/FS Interface Timing–30 MHz
Minimum set-up time for TXValid
Minimum hold time for TXValid
Minimum set-up time for Data (Transmit direction)
Minimum hold time for Data (Transmit direction)
Clock to Control Out time for TXReady, RXValid,
RXActive and RXError
Clock to Data out time (Receive direction)
Minimum set-up time for ValidH (transmit Direction)
Minimum hold time for ValidH (Transmit direction)
Clock to ValidH out time (Receive direction)
Control_Out
Control_In
DataOut
DataIn
CLK
Figure 9-2. 30-MHz Timing Interface Timing Constraints
TDSU_MIN
TCSU_MIN
TVSU_MIN
Description
TCH_MIN
TDH_MIN
PRELIMINARY
TVH_MIN
TCDO
TCCO
TCVO
Min.
20
20
20
1
1
1
1
1
1
Typ.
Max.
20
20
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
CY7C68000
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Notes