AD2S82 AD [Analog Devices], AD2S82 Datasheet - Page 6

• Manufacturer Part Number: AD2S82
• Description: Variable Resolution, Monolithic Resolver-to-Digital Converters
• Manufacturer: AD [Analog Devices]

AD2S81A/AD2S82A
CONNECTING THE CONVERTER
The power supply voltages connected to +V
should be +12 V dc and –12 V dc and must not be reversed.
The voltage applied to V
It is recommended that the decoupling capacitors are connected
in parallel between the power lines +V
adjacent to the converter. Recommended values are 100 nF
(ceramic) and 10 F (tantalum). Also capacitors of 100 nF and
10 F should be connected between +V
adjacent to the converter.
When more than one converter is used on a card, then separate
decoupling capacitors should be used for each converter.
The resolver connections should be made to the SIN and
COS inputs, REFERENCE I/P and SIGNAL GND as shown
ANALOG GND
SIGNAL GND
SIGNAL GND
RIPPLE CLK
RIPPLE CLK
COS I/P
COS I/P
SIN I/P
SIN I/P
COMP
+12V
–12V
+12V
–12V
LOAD
DATA
L
A1
A2
A2
A1
can be +5 V dc to +V
SC1
ENABLE
SWITCHING
SWITCHING
SEGMENT
SC2
SEGMENT
ENABLE
16-BIT UP/DOWN COUNTER
16-BIT UP/DOWN COUNTER
S
, –V
OUTPUT DATA LATCH
L
and DIGITAL GND
S
8 DATA BITS
and ANALOG GND
OUTPUT DATA LATCH
Figure 1a. AD2S82A Connection Diagram
Figure 1b. AD2S81A Connection Diagram
S
R-2R DAC
and –V
R-2R DAC
16 DATA BITS
S
.
S
AC ERROR
AC ERROR
pins
SELECT
BYTE
A3
A3
O/P
O/P
C1
C1
R1
R1
HP FILTER
HP FILTER
SELECT
BYTE
+5V
–6–
R2
R2
C2
C2
+5V
PHASE-SENSITIVE
PHASE-SENSITIVE
DIGITAL
in Figure 7 and described in the Connecting the Resolver
section.
The two signal ground wires from the resolver should be joined
at the SIGNAL GROUND pin of the resolver to minimize the
coupling between the sine and cosine signals. For this reason it
is also recommended that the resolver is connected using indi-
vidually screened twisted pair cables with the sine, cosine and
reference signals twisted separately.
SIGNAL GND and ANALOG GND are connected internally.
ANALOG GND and DIGITAL GND must be connected
externally.
The external components required should be connected as
shown in Figures 1a and 1b.
AD2S81A
AD2S82A
DEMOD
I/P
DEMOD
I/P
GND
DETECTOR
DETECTOR
REFERENCE I/P
REFERENCE I/P
DIGITAL
GND
BUSY
DATA TRANSFER
C3
C3
BUSY
R3
R3
DATA TRANSFER
DEMOD
O/P
DEMOD
O/P
LOGIC
VCO
VCO
DIR
O/P
R4
R4
LOGIC
VCO
+12V
+12V
OFFSET ADJUST
OFFSET ADJUST
DIR
INHIBIT
INHIBIT
R9
R9
INTEGRATOR
I/P
R8
R8
INTEGRATOR
I/P
–12V
–12V
INTEGRATOR
O/P
VCO I/P
INTEGRATOR
O/P
VCO I/P
C6
C6
R6
R7
R6
R7
TRACKING
RATE
SELECTION
BANDWIDTH
TRACKING
RATE
SELECTION
BANDWIDTH
SELECTION
C4
C4
SELECTION
R5
C5
R5
C5
VELOCITY
SIGNAL
VELOCITY
SIGNAL
REV. B