ISL59911IRZ INTERSIL [Intersil Corporation], ISL59911IRZ Datasheet - Page 15

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ISL59911IRZ

Manufacturer Part Number
ISL59911IRZ
Description
250MHz Triple Differential Receiver/ Equalizer with I2C Interface
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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Configuration Register Read
Figure 18 shows two views of the steps necessary to read one or
more words from the Configuration Register.
Signals from
the Host
SDA Bus
Signals from
the ISL59911
A7
D7
1
1
A6
D6
0
0
A5
S
A
R
T
T
D5
ISL59911 Serial Bus
0
ISL59911 Serial Bus
0
a a a a a a a 0
Serial Bus
Address
(Repeat if desired)
START Command
START Command
STOP Command
15
A4
D4
0
0
A
C
K
AAAAAAAA
A3
D3
1
1
Register
Address
FIGURE 18. CONFIGURATION REGISTER READ
ADDR1 ADDR0
ADDR1 ADDR0
A2
D2
C
A
K
R
E
S
T
A
R
T
A1
a a a a a a a 1
D1
Serial Bus
Address
ISL59911
R/W
A0
R/W
D0
0
1
C
A
K
d d d d d d d d
Signals the ending of serial I/O
ISL59911 Device Select Address Write
The first 7 bits of the first byte select the ISL59911 on the 2-wire
bus at the address set by the ADDR0 and ADDR1 pins.
R/W = 0, indicating that the next transaction will be a write.
Signals the beginning of serial I/O
ISL59911 Register Data Read(s)
This is the data read from the ISL59911’s Configuration Register.
Note: The ISL59911 Configuration Register address pointer
auto-increments after each data read: repeat this step to read
multiple sequential bytes of data from the Configuration Register.
ISL59911 Register Address Write
This sets the initial address of the ISL59911’s Configuration
Register for subsequent reading.
Ends the previous transaction and starts a new one.
ISL59911 Serial Bus Address Write
This is the same 7-bit address that was sent previously, however
the R/W bit is now a 1, indicating that the next transaction(s) will
be a read.
Read*
Data
C
A
K
O
S
T
P
* The Data Read step may be repeated to
read from the ISL59911’s Configuration
Register sequentially, beginning at the
Register Address written in the previous two
steps.
September 2, 2011
FN7548.0

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