ISL59911IRZ INTERSIL [Intersil Corporation], ISL59911IRZ Datasheet - Page 5

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ISL59911IRZ

Manufacturer Part Number
ISL59911IRZ
Description
250MHz Triple Differential Receiver/ Equalizer with I2C Interface
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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Company
Part Number
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Quantity
Price
Part Number:
ISL59911IRZ
Manufacturer:
INTERSIL
Quantity:
20 000
Company:
Part Number:
ISL59911IRZ
Quantity:
360
Company:
Part Number:
ISL59911IRZ
Quantity:
360
Electrical Specifications
(equalizer stages set to minimum boost, noise filter set to max bandwidth, x2 gain mode, GAIN
calibration executed, R
NOTE:
BW
SR
INPUT CHARACTERISTICS
CMIR
CMRR
C
R
C
R
V
OUTPUT CHARACTERISTICS
V
I
V(V
R(V
Gain
ΔGain
O
SYNCOUT
SYNCOUT
SCL, SDA PINS
f
V
V
V
V
I
t
ENABLE, ADDR0, ADDR1 PINS
V
V
I
7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
OUT
LEAKAGE
LEAKAGE
MAX
GLITCH
INDIFF
INCM
INDIFF_P-P
OUT
OL
IH
IL
HYST
IH
IL
INDIFF
INCM
NOISE
PARAMETER
CM
OUT
CM
CM
)
)
OS
HI
LO
Common Mode Amplifier Bandwidth
Common Mode Slew Rate
Common-mode Input Range
Common-mode Rejection Ratio
Differential Input Capacitance
Differential Input Resistance
CM Input Capacitance
CM Input Resistance
Max P-P Differential Input Range
Output Voltage Swing
Output Drive Current
Output Offset Voltage
CM Output Resistance of VCM_R/G/B
(CM Output Mode)
Gain
Channel-to-Channel Gain Mismatch
Integrated Noise at Output
Inputs @ GND through 50Ω.
High Level output on VS/HS
Low Level output on VS/HS
Maximum I
SDA Output Low Level
Input High Level
Input Low Level
Input Hysteresis
Input Leakage Current
Maximum Width of Glitch on SCL (or
SDA) Guaranteed to be Rejected
Input High Level
Input Low Level
Input Leakage Current
L
= 5pF || (75Ω + 75Ω) to GND, thermal pad connected to -5V, unless otherwise specified.
2
DESCRIPTION
C Operating Frequency
5
V+ = V+
OUT
OUT
R
= V+
G
= V+
10k || 5pF load
V
Differential signal passed undistorted.
Effective headroom is reduced by the p-p
amplitude of differential swing divided by 2.
Measured at 100kHz
Measured at 10MHz
Capacitance between V
Resistance between V
(due to common mode input resistance)
Capacitance from V
Resistance from V
Delta V
R
Post-offset calibration
At 100kHz
x1 mode
x2 mode
x1 and x2 modes
0m of Equalization (Nominal)
300m of Equalization
10k || 5pF load, SYNC Output Mode
10k || 5pF load, SYNC Output Mode
V
IN
SINK
L
B
= 10Ω, V
= -0.5V to +1.5V
= +5V, V- = V-
ISL59911
= 6mA
IN
+ - V
IN
IN
+ - V
- when slope gain falls to 0.9
CONDITIONS
R
IN
IN
IN
= V-
+ and V
- = ±2V
+ and V
IN
INP
G
+ and V
= V-
and V
IN
IN
- to GND
B
- to GND
IN
= V-
INM
-
D
= -5V, T
DC
= 0dB), all analog inputs at 0V, auto offset
A
= +25°C, all registers at default settings
(Note 7)
V+ - 1.5
0.95
MIN
400
1.9
-20
1.9
50
3
3
-3.2/+4.0
(Continued)
±2.75
0.55
TYP
±22
0.1
0.5
1.3
2.5
1.0
2.0
24
88
58
20
25
20
-8
4
(Note 7)
1.05
MAX
September 2, 2011
2.1
0.4
0.4
1.5
0.8
+5
±3
±1
±1
FN7548.0
mV
UNIT
V/ns
MHz
kHz
mA
V/V
mV
µA
µA
dB
dB
pF
pF
ns
Ω
%
V
V
V
V
V
V
V
V
V
V
V
RMS

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