AD9874BST AD [Analog Devices], AD9874BST Datasheet - Page 31

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AD9874BST

Manufacturer Part Number
AD9874BST
Description
IF Digitizing Subsystem
Manufacturer
AD [Analog Devices]
Datasheet
Figure 22b plots the nominal system NF with 16-bit output data
as a function of AGC in both narrow-band and wideband mode.
In wideband mode, the NF curve is virtually unchanged relative to
the 24-bit output data because the output SNR before truncation
is always less than the 96 dB SNR that 16-bit data can support.
Figure 22b. Nominal System Noise Figure and Peak SNR
vs. AGCG Setting (f
16-bit I/Q data)
REV. 0
Figure 23a. Total In-Band Noise + Spur Power with No Signal Applied as a Function of the LO Frequency
(f
CLK
17
16
15
14
13
12
11
10
9
8
0
= 18 MHz and Output Signal Bandwidth of 150 kHz)
SNR = 94.1dBFS
Figure 23b. Same as Figure 23a Excluding LO Frequencies Known to Produce Large In-Band Spurs
SNR = 83dBFS
–50
–60
–70
–80
–90
–50
–60
–70
–80
–90
IF
0
0
BW = 150kHz
3
= 73.35 MHz, f
VGA ATTENUATION – dB
BW = 50kHz
BW = 10kHz
50
6
50
SNR = 98.8dBFS
CLK
= 18 MSPS, and
SNR = 89.9dBFS
9
100
100
1 2
LO FREQUENCY – MHz
LO FREQUENCY – MHz
–31–
150
150
However, in narrow-band mode, where the output SNR approaches
or exceeds the SNR that can be supported with 16-bit data, the
degradation in system NF is more severe. Furthermore, if the
signal processing within the DSP adds noise at the level of an LSB,
the system noise figure can be degraded even more than Figure 22b
shows. For example, this could occur in a fixed 16-bit DSP whose
code is not optimized to process the AD9874’s 16-bit data with
minimal quantization effects. To limit the quantization effects
within the AD9874, the 24-bit data undergoes noise shaping just
prior to 16-bit truncation, thus reducing the in-band quantization
noise by 5 dB (with 2 oversampling). This explains why 98.8 dBFS
SNR performance is still achievable with 16-bit data in a 10 kHz BW.
APPLICATION CONSIDERATIONS
Frequency Planning
The LO frequency (and/or ADC clock frequency) must be chosen
carefully to prevent known internally generated spurs from mixing
down along with the desired signal, thus degrading the SNR
performance. The major sources of spurs in the AD9874 are the
ADC clock and digital circuitry operating at 1/3 of f
the clock frequency (f
determining which LO (and therefore IF) frequencies are viable.
200
200
CLK
) is the most important variable in
250
250
300
300
AD9874
CLK
. Thus,

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