MAX5816 MAXIM [Maxim Integrated Products], MAX5816 Datasheet - Page 15

• Manufacturer Part Number: MAX5816
• Description: Ultra-Small, Quad-Channel, 12-Bit Buffered Output DAC with Internal Reference and I2C Interface
• Manufacturer: MAXIM [Maxim Integrated Products]

an open-drain output. A pullup resistor, typically 4.7kI is
required on SDA. SCL operates only as an input. A pullup
resistor, typically 4.7kI, is required on SCL if there are
multiple masters on the bus, or if the single master has
an open-drain SCL output.
Series resistors in line with SDA and SCL are optional.
Series resistors protect the digital inputs of the MAX5816
from high voltage spikes on the bus lines and mini-
mize crosstalk and undershoot of the bus signals. The
MAX5816 can accommodate bus voltages higher than
V
are not recommended and may result in significantly
increased interface currents.
SDA and SCL idle high when the bus is not in use. A mas-
ter initiates communication by issuing a START condition.
A START condition is a high-to-low transition on SDA with
SCL high. A STOP condition is a low-to-high transition
on SDA while SCL is high
from the master signals the beginning of a transmission
to the MAX5816. The master terminates transmission
and frees the bus, by issuing a STOP condition. The bus
remains active if a Repeated START condition is gener-
ated instead of a STOP condition.
The MAX5816 recognizes a STOP condition at any point
during data transmission except if the STOP condition
occurs in the same high pulse as a START condition.
Transmissions ending in an early STOP condition will not
impact the internal device settings. If the STOP occurs
during a readback byte, the transmission is terminated
and a later read mode request will begin transfer of the
requested register data from the beginning (this applies
to combined format I
interface verification mode transfers will be corrupted).
See
The slave address is defined as the seven most sig-
nificant bits (MSBs) followed by the R/W bit. See
Figure
2 LSBs determined by ADDR as shown in
the R/W bit to 1 configures the MAX5816 for read mode.
Ultra-Small, Quad-Channel, 12-Bit Buffered Output DAC
DD
Figure
up to a limit of 5.5V; bus voltages lower than V
4. The five most significant bits are 00011 with the
2.
I
2
 Maxim Integrated Products 15
C START and STOP Conditions
Repeated START Conditions
2
C read mode transfers only,
(Figure
with Internal Reference and I
I
2
I
C Early STOP and
2). A START condition
2
C Slave Address
Table
1. Setting
DD
Figure 2. I
Setting the R/W bit to 0 configures the MAX5816 for write
mode. The slave address is the first byte of information
sent to the MAX5816 after the START condition.
The MAX5816 has the ability to detect an unconnected
state on the ADDR input for additional address flexibility;
if leaving the ADDR input unconnected, be certain to
minimize all loading on the pin (i.e. provide a landing for
the pin, but do not allow any board traces).
Table 1. I
TDFN Package
SDA
SCL
INVALID START/STOP PULSE PAIRINGS -ALL WILL BE RECOGNIZED AS STARTS
ADDR
GND
N.C.
V
DD
2
P
C START, Repeated START, and STOP Conditions
S
2
VALID START, REPEATED START, AND STOP PULSES
C Slave Address LSBs for
S
S
P
A1
0
1
1
Sr
2
C Interface
MAX5816
P
S
P
A0
0
0
1
P