MAX5816 MAXIM [Maxim Integrated Products], MAX5816 Datasheet - Page 16

• Manufacturer Part Number: MAX5816
• Description: Ultra-Small, Quad-Channel, 12-Bit Buffered Output DAC with Internal Reference and I2C Interface
• Manufacturer: MAXIM [Maxim Integrated Products]

A broadcast address is provided for the purpose of
updating or configuring all MAX5816 devices on a
given I
respond to the broadcast device address 00010000. The
devices will respond to the broadcast address, regard-
less of the state of the address pins. The broadcast mode
is intended for use in write mode only (as indicated by
R/W = 0 in the address given).
In write mode, the acknowledge bit (ACK) is a clocked
9th bit that the MAX5816 uses to handshake receipt of
each byte of data as shown in
pulls down SDA during the entire master-generated 9th
clock pulse if the previous byte is successfully received.
Monitoring ACK allows for detection of unsuccessful data
transfers. An unsuccessful data transfer occurs if a receiv-
ing device is busy or if a system fault has occurred. In the
event of an unsuccessful data transfer, the bus master will
retry communication.
In read mode, the master pulls down SDA during the 9th
clock cycle to acknowledge receipt of data when the
MAX5816 is in read mode. An acknowledge is sent by the
master after each read byte to allow data transfer to con-
tinue. A not-acknowledge is sent when the master reads
the final byte of data from the MAX5816, followed by a
STOP condition.
A command byte follows the slave address. A command
byte is typically followed by two data bytes unless it is
the last byte in the transmission. If data bytes follow the
command byte, the command byte indicates the address
of the register that is to receive the following two data
bytes. The data bytes are stored in a temporary register
and then transferred to the appropriate register during
Figure 4. I
Ultra-Small, Quad-Channel, 12-Bit Buffered Output DAC
SDA
SCL
2
C bus. All MAX5816 devices acknowledge and
2
C Single Register Write Sequence
START
I
2
C Command Byte and Data Bytes
BYTE #1: I
 Maxim Integrated Products 16
0
WRITE ADDRESS
0
2
C SLAVE ADDRESS
0
1 1
I
A
2
with Internal Reference and I
A1 A0 W
C Broadcast Address
ACK. GENERATED BY MAX5816
Figure
I
2
C Acknowledge
A
23
BYTE #2: COMMAND BYTE
3. The MAX5816
22
WRITE COMMAND
21
(B[23:16])
20 19 18 17
16
A
15 14 13 12 11 10 9
BYTE #3: DATA HIGH BYTE
the ACK periods between bytes. This avoids any glitch-
ing or digital feedthrough to the DACs while the interface
is active.
A master device communicates with the MAX5816
by transmitting the proper slave address followed by
command and data words. Each transmit sequence
is framed by a START or Repeated START condi-
tion and a STOP condition as described above. Each
word is 8 bits long and is always followed by an
acknowledge clock (ACK) pulse as shown in the
Figure 4
address of the MAX5816 with R/W = 0 to indicate a
write. The second byte contains the command (or
register) to be written and the third and fourth bytes
contain the data to be written. By repeating the com-
mand plus data byte pairs (Byte #2 through Byte #4 in
Figure 4
command writes using a single I
There is no limit as to how many commands the user can
execute with a single write sequence. The MAX5816 sup-
ports this capability for all user-accessible write mode
commands.
Figure 3. I
SDA
SCL
CONDITION
WRITE DATA
START
(B[15:8])
I
2
C Write Operations (Standard Protocol)
2
and
C Acknowledge
and
8
Figure
1
A
Figure
7 6 5 4 3 2 1
BYTE #4: DATA LOW BYTE
5), the user can execute multiple
2
WRITE DATA
5. The first byte contains the
(B[7:0])
2
NOT ACKNOWLEDGE
C Interface
ACKNOWLEDGE
0
MAX5816
2
A
C write sequence.
ACKNOWLEDGMENT
COMMAND EXECUTED
CLOCK PULSE
STOP
FOR
9