MAX6884ETP MAXIM [Maxim Integrated Products], MAX6884ETP Datasheet - Page 28

• Manufacturer Part Number: MAX6884ETP
• Description: EEPROM-Programmable, Hex Power-Supply Supervisory Circuits
• Manufacturer: MAXIM [Maxim Integrated Products]

EEPROM-Programmable, Hex
Power-Supply Supervisory Circuits
SA7 through SA4 represent the standard 2-wire inter-
face address (1010); for devices with EEPROM, SA2
corresponds to the A0 address inputs of the MAX6884/
MAX6885 (hardwired as logic-low or logic-high). SA0 is
a read/write flag bit (0 = write, 1 = read).
The A0 address input allows up to two MAX6884/
MAX6885s to connect to one bus. Connect A0 to GND
or to the 2-wire serial-interface power supply (see
Figure
The send byte protocol allows the master device to send
one byte of data to the slave device (see
send byte presets a register pointer address for a subse-
quent read or write. The slave sends a NACK instead of
an ACK if the master tries to send an address that is not
allowed or if the device is writing data to EEPROM or is
booting. If the master sends C0h, the data is ACK,
because this could be the start of the block write proto-
col, and the slave expects following data byte. If the mas-
ter sends a STOP condition, the internal address pointer
does not change. If the master sends C1h, this signifies
that the block read protocol is expected, and a repeated
START condition should follow. The device reboots if the
master sends C4h. The send byte procedure follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit data byte.
5) The addressed slave asserts an ACK on SDA.
6) The master sends a STOP condition.
The write byte protocol allows the master device to write a
single byte in the register bank or in the EEPROM (see
Figure
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit command code.
Figure
28
SDA
START
SCL
write bit (low).
write bit (low).
______________________________________________________________________________________
10. Slave Address
11). The write byte/word procedure follows:
10).
MSB
1
0
1
0
0
A0
LSB
x
Figure
R/W
Write Byte
Send Byte
11). The
ACK
5) The addressed slave asserts an ACK on SDA.
6) The master sends an 8-bit data byte.
7) The addressed slave asserts an ACK on SDA.
8) The master sends a STOP condition.
To write a single byte to the register bank, only the 8-bit
command code and a single 8-bit data byte are sent.
The command code must be in the 00h to 2Fh range.
The data byte is written to the register bank if the com-
mand code is valid. The slave generates a NACK at
step 5 if the command code is invalid or any internal
operations are ongoing. To write a single byte of data to
the user or configuration EEPROM, the 8-bit command
code and a single 8-bit data byte are sent.
The block write protocol allows the master device to
write a block of data (1 to 16 bytes) to the EEPROM or
to the register bank (see
address must already be set by the send byte protocol
and the command code must be C0h. If the number of
bytes to be written causes the address pointer to
exceed 2Fh for the configuration register or 9Fh for the
configuration EEPROM, the address pointer stops
incrementing, overwriting the last memory address with
the remaining bytes of data. Only the last data byte
sent is stored in 17h (as 2Fh is read only and a write
cause no change in the content). If the number of bytes
to be written exceeds the address pointer 9Fh for the
user EEPROM, the address pointer stops incrementing
and continues writing exceeding data to the last
address. Only the last data is actually written to 9Fh.
The block write procedure follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a
3) The addressed slave asserts an ACK on SDA.
4) The master sends the 8-bit command code for
5) The addressed slave asserts an ACK on SDA.
6) The master sends the 8-bit byte count (1 to 16
7) The addressed slave asserts an ACK on SDA.
8) The master sends 8 bits of data.
9) The addressed slave asserts an ACK on SDA.
10) Repeat steps 8 and 9 N - 1 times.
11) The master generates a STOP condition.
write bit (low).
block write (C0h).
bytes) N.
Figure
11). The destination
Block Write