MAX6909 MAXIM [Maxim Integrated Products], MAX6909 Datasheet - Page 28

• Manufacturer Part Number: MAX6909
• Description: I2C-Compatible Real-Time Clocks with uP Supervisor and NV RAM Controller
• Manufacturer: MAXIM [Maxim Integrated Products]

The most accurate way to read the timekeeping regis-
ters is to do a burst read. In the burst read, the main
timekeeping registers (seconds, minutes, hours, date,
month, day, year) and the control register are read
sequentially, in the order listed with the seconds regis-
ter first. They must be all read out as a group of eight
registers, with 8 bits each, for proper execution of the
burst read function. All seven timekeeping registers are
latched upon the receipt of the burst read command.
Worst-case errors that can occur between the actual
time and the read time is 1s, assuming the entire burst
read is done in less than 1s.
The time and date can be set by writing to the time-
keeping registers (seconds, minutes, hours, date,
month, day, year, and century). To avoid changing the
current time by an incomplete write operation, the cur-
rent time value is buffered from being written directly to
the timekeeping registers. The timekeeping registers
continue to count, and on the next rising edge of the
1Hz seconds clock, the new data is loaded into the
timekeeping registers. The new value will be increment-
ed on the next rising of the 1Hz seconds clock.
Collision-detection circuitry ensures that this does not
happen coincident with a seconds register update to
ensure accurate time data is being written. This avoids
time data changes during a write operation. An incom-
plete write operation aborts the time update procedure
and the contents of the input buffer are discarded.
I
Supervisor and NV RAM Controller
Figure 25. MAX6909/MAX6910 Data Transfer
28
2
C-Compatible Real-Time Clocks with µP
______________________________________________________________________________________
Writing to the Timekeeping Registers
S
S
S
S
SLAVE ADDRESS: 1101000
ADDR: 5-BIT RAM OR REGISTER ADDRESS
R: RAM/REGISTER SELECTION BIT. R = 0 WHEN REGISTER IS SELECTED; R = 1 WHEN RAM IS SELECTED.
S: START CONDITION FROM MASTER
P: READ CONDITION FROM MASTER
A
A
A
S
M
M
SINGLE WRITE
SINGLE READ
BURST WRITE
BURST READ
: ACKNOWLEDGE FROM SLAVE
BIT 7...............................BIT 0
BIT 7...............................BIT 0
BIT 7...............................BIT 0
BIT 7...............................BIT 0
: ACKNOWLEDGE FROM MASTER
: NOT ACKNOWLEDGE FROM MASTER
7-BIT SLAVE ADDRESS
7-BIT SLAVE ADDRESS
7-BIT SLAVE ADDRESS
7-BIT SLAVE ADDRESS
0
0
0
0
ACK BIT
ACK BIT
ACK BIT
ACK BIT
A
A
A
A
S
S
S
S
BIT 7......................................BIT 0 ACK BIT
BIT 7......................................BIT 0 ACK BIT
BIT 7......................................BIT 0 ACK BIT
BIT 7......................................BIT 0 ACK BIT
1 R
1 R
1 R
1 R
ADDRESS/COMMAND BYTE
ADDRESS/COMMAND BYTE
ADDRESS/COMMAND BYTE
ADDRESS/COMMAND BYTE
11111
11111
ADDR
ADDR
0
1
0
1
A
A
A
A
S
S
S
S
If single write operations are to be used to write to each
of the timekeeping registers, then error checking is
needed. If the seconds register is to be updated,
update it first and then read it back and store its value
as the initial seconds. Update the remaining timekeep-
ing registers and then read the seconds register again
(final seconds). If initial seconds were 59, ensure they
are still 59. If initial seconds were not 59, ensure that
final seconds are within 1s of initial seconds. If the sec-
onds register is not to be written to, then read the sec-
onds register first and save it as initial seconds. Write to
the required timekeeping registers and then read the
seconds register again (final seconds). If initial seconds
were 59, ensure they are still 59. If initial seconds were
not 59, ensure that final seconds are within 1s of initial
seconds.
Although both single writes and burst writes are possi-
ble, the most accurate way to write to the timekeeping
registers is to do a burst write. In the burst write, the
main timekeeping registers (seconds, minutes, hours,
date, month, day, year) and the control register are
written to sequentially. They must be all written to as a
group of eight registers, with 8 bytes each, for proper
execution of the burst write function. All seven time-
keeping registers are simultaneously loaded into the
input buffer at the end of the 2-wire bus write operation.
The worst-case error that can occur between the actual
time and the write time update is 1s. Figure 25 shows
MAX6909/MAX6910 data transfer.
BIT 7...................BIT 0 ACK BIT
BIT 7.................BIT 0 ACK BIT
S
S
FIRST 8_BIT DATA
8_BIT DATA
BIT 7.........................BIT 0 ACK BIT
BIT 7.........................BIT 0 ACK BIT
7-BIT SLAVE ID
7-BIT SLAVE ID
A
A
S
S
BIT 7...................BIT 0
P
1 A
1 A
LAST 8_BIT DATA
S
S
BIT 7.........................BIT 0
BIT 7....................BIT 0
BIT 7....................BIT 0
FIRST 8_BIT DATA
LAST 8_BIT DATA
8_BIT DATA
A
ACK BIT
S
P
A
A
A
ACK BIT
ACK BIT
M
M
M
P
P