ADV7181 AD [Analog Devices], ADV7181 Datasheet - Page 40

• Manufacturer Part Number: ADV7181
• Description: Multiformat SDTV Video Decoder
• Manufacturer: AD [Analog Devices]

ADV7181B
PF Polarity FIELD, Address 0x37 [3]
The polarity of the FIELD pin can be inverted using the PF bit.
FIELD pin can be inverted using the PF bit.
When PF is 0 (default), FIELD is active high.
When PF is 1, FIELD is active low.
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
VIDEO
VIDEO
VIDEO
VIDEO
FIELD
FIELD
HS
HS
VS
VS
H
V
H
V
F
F
*APPLIES IF NEMAVMODE = 0:
MUST BE MANUALLY SHIFTED IF NEWAVMODE = 1.
262
262
NVBEG[4:0] = 0x5
525
525
NVBEG[4:0] = 0x5
263
263
1
1
264
264
2
2
Figure 20. NTSC Default (BT.656). The polarity of H, V, and F is embedded in the data.
NFTOG[4:0] = 0x3
265
265
Figure 21. NTSC Typical VSync/Field Positions Using Register Writes in Table 54
NFTOG[4:0] = 0x3
3
3
266
266
FIELD 1
FIELD 2
FIELD 1
4
FIELD 2
4
267
267
5
5
268
268
NVBEG[4:0] = 0x0
NVBEG[4:0] = 0x0
6
6
269
269
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7
7
270
270
8
8
271
271
NVEND[4:0] = 0x3
NVEND[4:0] = 0x3
NVEND[4:0] = 0x4
9
9
NVEND[4:0] = 0x4
272
272
10
10
273
273
11
11
274
274
12
12
NFTOG[4:0] = 0x5
NFTOG[4:0] = 0x5
275
275
13
13
276
*BT.656-4
276
REG 0x04, BIT 7 = 1
14
19
*BT.656-4
REG 0x04, BIT 7 = 1
277
283
15
20
284
284
21
21
285
285
22
22