ADV7343 AD [Analog Devices], ADV7343 Datasheet - Page 39

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ADV7343

Manufacturer Part Number
ADV7343
Description
Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
Manufacturer
AD [Analog Devices]
Datasheet

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SR7 to
SR0
0x88
0x89
1
When set to 0, the horizontal/vertical counters automatically wrap around at the end of the line/field/frame of the selected standard. When set to 1, the
horizontal/vertical counters are free running and wrap around when external sync signals indicate to do so.
SD Mode
SD Mode
Register
Register 7
Register 8
Bit Description
Reserved.
SD Noninterlaced Mode.
SD Double Buffering.
SD Input Format.
SD Digital Noise Reduction.
SD Gamma Correction Enable.
SD Gamma Correction Curve Select.
SD Undershoot Limiter.
Reserved.
SD Black Burst Output on DAC
Luma.
SD Chroma Delay.
Reserved.
Rev. 0 | Page 39 of 88
7
0
1
0
6
0
1
0
5
0
1
0
0
1
1
Bit Number
4
0
0
1
1
0
1
0
1
3
0
1
0
1
0
1
2
0
1
0
1
0
1
0
0
1
1
0
0
0
1
0
1
Register Setting
Disabled.
Enabled.
Disabled.
Enabled.
8-bit input.
16-bit input.
Reserved.
Reserved.
Disabled.
Enabled.
Disabled.
Enabled.
Gamma Correction Curve A.
Gamma Correction Curve B.
Disabled.
−11 IRE.
−6 IRE.
−1.5 IRE.
0 must be written to this bit.
Disabled.
Enabled.
Disabled.
4 clock cycles.
8 clock cycles.
Reserved.
0 must be written to these bits.
ADV7342/ADV7343
Reset
Value
0x00
0x00

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