ISL78010_11 INTERSIL [Intersil Corporation], ISL78010_11 Datasheet - Page 4

• Manufacturer Part Number: ISL78010_11
• Description: Automotive Grade TFT-LCD Power Supply
• Manufacturer: INTERSIL [Intersil Corporation]

Electrical Specifications
NOTE:
Pin Descriptions
FAULT DETECTION
t
OT
I
LOGIC ENABLE
V
V
I
I
1, 2, 4, 6, 8, 10, 12,
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
FAULT
PG
LOW
HIGH
HI
LO
PARAMETER
16, 18, 23, 32
19, 20, 21, 22
and are not production tested.
PIN NAME
14, 27
13
15
17
24
25
26
28
29
30
31
11
3
5
7
9
Fault Time Out
Over-temperature Threshold
PG Pull-down Current
Logic High Threshold
Logic Low Threshold
Logic Low Bias Current
Logic High Bias Current
PIN NUMBER
SGND
PGND
DRVP
DRVN
DELB
DRVL
VREF
CDLY
CINT
VDD
FBP
FBN
FBB
FBL
NC
EN
PG
LX
DESCRIPTION
4
V
+105°C temperature range, unless otherwise specified. Boldface limits apply over the operating
temperature range, -40°C to +105°C. (Continued)
DD
= 5V, V
Not connected
Open drain output for gate drive of optional V
Drain of the internal N-Channel boost FET
Positive LDO base drive; open drain of an internal N-Channel FET
Positive LDO voltage feedback input pin; regulates to 1.2V nominal
Logic LDO base drive; open drain of an internal N-Channel FET
Logic LDO voltage feedback input pin; regulates to 1.2V nominal
Low noise signal ground
Negative LDO base drive; open drain of an internal P-Channel FET
Negative LDO voltage feedback input pin; regulates to 0.2V nominal
Power ground, connected to source of internal N-Channel boost FET
Bandgap reference output voltage; bypass with a 0.1µF to SGND
V
operation
Boost regulator voltage feedback input pin; regulates to 1.2V nominal
Enable pin; High = Enable; Low or floating = Disable
Positive supply
Push-pull gate drive of optional fault protection FET; when chip is disabled or when a fault has been
detected, this is high
A capacitor connected from this pin to SGND sets the delay time for start-up sequence and sets the fault
timeout time
BOOST
BOOST
integrator output; connect capacitor to SGND for PI-mode or connect to V
= 11V, I
C
VPG > 0.6V
VPG < 0.6V
at V
DLY
EN
LOAD
= 0.22µF
= 5V
ISL78010
= 200mA, V
CONDITION
ON
= 15V, V
DESCRIPTION
BOOST
OFF
delay FET
= -5V, V
(Note 6)
LOGIC
MIN
2.3
12
= 2.5V, limits over -40°C to
TYP
140
1.7
0.2
50
15
18
(Note 6)
DD
MAX
0.8
24
2
for P-mode
May 3, 2011
UNIT
FN6501.1
mA
ms
µA
µA
µA
°C
V
V