DSP56001FE33 MOTOROLA [Motorola, Inc], DSP56001FE33 Datasheet - Page 13

• Manufacturer Part Number: DSP56001FE33
• Description: 24-Bit General Purpose Digital Signal Processor
• Manufacturer: MOTOROLA [Motorola, Inc]

DSP56001
Num
23
24
25
26
27
28
AC Electrical Characteristics - Reset, Stop, Mode Select, and Interrupt Timing
Synchronous Interrupt Setup Time
from IRQA, IRQB Assertion to the
Synchronous Rising Edge of External
Clock (see Notes 5, 6)
Synchronous Interrupt Delay Time
from the Synchronous Rising Edge of
External Clock to the First External
Address Output Valid Caused by the
First Instruction Fetch after Coming out
of Wait State (see Notes 3, 5)
Duration for IRQA Assertion to
Recover from Stop State (see Note 4)
Delay from IRQA Assertion to Fetch of
First Instruction (for Stop) for
(see Notes 1, 2, and 7)
Duration for Level Sensitive IRQA
Assertion to Fetch of First Interrupt
Instruction (for Stop) for
(see Notes 1, 2, and 7)
Delay from Level Sensitive IRQA
Assertion to Fetch of First Interrupt
Instruction (for Stop) for
(see Notes 1, 2, and 7)
Notes:
4. The minimum is specified for the duration of an edge triggered IRQA interrupt required to recover
1. A clock stabilization delay is required when using the on-chip crystal oscillator in
2. Circuit stabilization delay is required during reset when using an external clock in
3. For Revision B silicon, the min and max numbers are 12cyc+Tch+8 and 12cyc+Tch+30, respec-
5. Timing #23 is for all IRQx interrupts while timing #24 is only when exiting WAIT.
6. Timing #23 triggers off T1 in the normal state and off T1/T3 when exiting the WAIT state.
7. The timings in the table are for Rev. C parts. The timings for Rev. C parts are shorter by 1 cyc than
tively.
During this stabilization period, T will not be constant. Since this stabilization period
two cases:
1) after power-on reset, and
2) when recovering from Stop mode.
varies, a delay of 150,000T is typically allowed to assure that the oscillator is stabilized
before executing programs. While it is possible to set OMR bit 6 = 1 when using
the internal crystal oscillator, it is not recommended and these specifications do not
guarantee timings for that case. See Section 8.5 in the DSP56000/DSP56001 User’s Manual for
additional information.
two cases:
1) after power-on reset, and
2) when recovering from Stop mode.
from the STOP state without having the IRQA interrupt accepted.
the Rev. B parts when OMR6=0
I nternal Osc / OMR bit 6 = 0
External Clock / OMR bit 6 = 1
External Clock / OMR bit 6 = 1
External Clock / OMR bit 6 = 1
Characteristics
Internal Osc / OMR bit 6 = 0
Internal Osc / OMR bit 6 = 0
DSP56001 Electrical Characteristics
65545
65533
65545
5
13
17
17
*
tch+8
cyc+tcl
.
Min
+tcl
*
25
25
*
*
cyc+
cyc
cyc
20.5 MHz
*
*
*
(Continued)
cyc
cyc
cyc
13
tch+30
cyc-10
Max
*
—
—
—
—
—
—
—
cyc+
65545
65533
65545
5
13
17
*
17
tch+6
cyc+tcl
Min
+tcl
*
19
19
*
*
cyc+
cyc
cyc
*
*
*
27 MHz
cyc
cyc
cyc
13
tch+23
cyc-8
Max
*
—
—
—
—
—
—
—
cyc+
65545
65533
65545
5
13
17
*
17
tch+5
cyc+tcl
Min
+tcl
*
16
16
*
*
cyc+
cyc
cyc
*
*
*
33 MHz
cyc
cyc
cyc
13
tch+19
cyc-7
Max
MOTOROLA
*
—
—
—
—
—
—
—
cyc+
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
13