AT40KEL040KW1-E ATMEL [ATMEL Corporation], AT40KEL040KW1-E Datasheet - Page 4
AT40KEL040KW1-E
Manufacturer Part Number
AT40KEL040KW1-E
Description
Rad Hard Reprogrammable FPGAs with FreeRAM
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT40KEL040KW1-E.pdf
(42 pages)
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The Symmetrical
Array
4
AT40KEL040
At the heart of the Atmel architecture is a symmetrical array of identical cells (Figure 1).
The array is continuous from one edge to the other, except for bus repeaters spaced
every four cells (Figure 2 on page 5). At the intersection of each repeater row and col-
umn is a 32 x 4 RAM block accessible by adjacent buses. The RAM can be configured
as either a single-ported or dual-ported RAM
nous operation.
Note:
Figure 1. Symmetrical Array Surrounded by I/O
Note:
1. The right-most column can only be used as single-port RAM.
AT40K has registered I/Os. Group enable every sector for tri-states on obuf’s.
= I/O Pad
= AT40K Cell
= Repeater Row
= Repeater Column
(1)
, with either synchronous or asynchro-
= FreeRAM
4155I–AERO–06/06
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