XC3042 XILINX [Xilinx, Inc], XC3042 Datasheet - Page 32

• Manufacturer Part Number: XC3042
• Description: Logic Cell Array Families
• Manufacturer: XILINX [Xilinx, Inc]

XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families
Figure 26. Relative Delay as a Function of Temperature, Supply Voltage and Processing Variations
Figure 27. Clock Rate as a Function of Logic Complexity
Gate Levels:
CLB Levels:
300
250
200
150
100
50
0
XC3000-125
1.00
0.80
0.60
0.40
0.20
XC3100-3
(Number of Combinational Levels between
Flip-Flops)
4 CLBs
(4-16)
– 55
3 CLBs
(3-12)
– 40
2 CLBs
– 20
(2-8)
1 CLB
(1-4)
0
TYPICAL COMMERCIAL
TYPICAL MILITARY
(+ 5.0 V, 25 C)
Toggle
X3250
Rate
TEMPERATURE ( C)
25
2-134
Power
Power Distribution
Power for the LCA device is distributed through a grid to
achieve high noise immunity and isolation between logic
and I/O. Inside the LCA device, a dedicated V
ground ring surrounding the logic array provides power to
the I/O drivers. An independent matrix of V
groundlines supplies the interior logic of the device. This
power distribution grid provides a stable supply and ground
for all internal logic, providing the external package power
pins are all connected and appropriately decoupled. Typi-
cally a 0.1- F capacitor connected near the V
ground pins will provide adequate decoupling.
Output buffers capable of driving the specified 4- or 8-mA
loads under worst-case conditions may be capable of
driving as much as 25 to 30 times that current in a best
case. Noise can be reduced by minimizing external load
capacitance and reducing simultaneous output transitions
in the same direction. It may also be beneficial to locate
heavily loaded output buffers near the ground pads. The
I/O Block output buffers have a slew-limited mode which
should be used where output rise and fall times are not
speed critical. Slew-limited outputs maintain their dc drive
capability, but generate less external reflections and inter-
nal noise.
40
70
SPECIFIED WORST-CASE VALUES
80
100
125
X6094
CC
CC
CC
and
and
and